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EP7209
78
DS453PP2
5.10.2
PALLSW Least Significant Word
—
LCD Palette Register
ADDRESS: 0x8000.0580
The least and most significant word LCD palette registers make up a 64-bit read/write register which
maps the logical pixel value to a physical gray scale level. The 64-bit register is made up of 16 x 4-bit
nibbles, each nibble defines the gray scale level associated with the appropriate pixel value. If the
LCD controller is operating in two bits per pixel, only the lower 4 nibbles are valid (D[15:0] in the least
significant word). Similarly, one bit per pixel means only the lower 2 nibbles are valid (D[7:0]) in the
least significant word.
5.10.3
PALMSW Most Significant Word
—
LCD Palette Register
ADDRESS: 0x8000.0540
The pixel to gray scale level assignments and the actual physical color and pixel duty ratio for the gray
scale values are shown in
Table 46
. Note that colors 8
–
15 are the inverse of colors 7
–
0 respectively.
This means that colors 7 and 8 are identical. Therefore, in reality only 15 gray scales available, not
16. The steps in the gray scale are non-linear, but have been chosen to give a close approximation
to perceived linear gray scales. The is due to the eye being more sensitive to changes in gray level
close to 50% gray (See
PALLSW
description).
25:29
AC prescale
: The AC prescale field is a 5-bit number that sets the LCD AC bias frequency. This
frequency is the required AC bias frequency for a given manufacturer
’
s LCD plate. This fre-
quency is derived from the frequency of the line clock (CL[1]). The LCD M signal will toggle after
n+1 counts of the line clock (CL[1]) where n is the number programmed into the AC prescale
field. This number must be chosen to match the manufacturer
’
s recommendation. This is nor-
mally 13, but must not be exactly divisible by the number of lines in the display.
GSEN
: Gray scale enable bit. Setting this bit enables gray scale output to the LCD. When this bit
is cleared each bit in the video map directly corresponds to a pixel in the display.
GSMD
: Gray scale mode bit. Clearing this bit sets the controller to 2-bits per pixel (4 gray scales),
setting it sets it to 4 bits per pixel (16 gray scales). This bit has no effect if GSEN is cleared.
30
31
31:28
Gray scale
value for pixel
value 7
27:24
Gray scale
value for pixel
value 6
23:20
Gray scale
value for pixel
value 5
19:16
Gray scale
value for pixel
value 4
15:12
Gray scale
value for pixel
value 3
11:8
7:4
3:0
Gray scale
value for pixel
value 2
Gray scale
value for pixel
value 1
Gray scale
value for pixel
value 0
31:28
Gray scale
value for pixel
value 15
27:24
Gray scale
value for pixel
value 14
23:20
Gray scale
value for pixel
value 13
19:16
Gray scale
value for pixel
value 12
15:12
Gray scale
value for pixel
value 11
11:8
7:4
3:0
Gray scale
value for pixel
value 10
Gray scale
value for pixel
value 9
Gray scale
value for pixel
value 8
Bit
Description
Table 45. LCDCON
(cont.)