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EP7209
DS453PP2
15
ADC
Interface
(SSI1)
ADCCLK
nADCCS
ADCOUT
ADCIN
SMPCLK
LEDDRV
PHDIN
TXD[1:2]
RXD[1:2]
DSR
DCD
CTS
O
O
O
I
O
O
I
O
I
I
I
I
Serial clock output
Chip select for ADC interface
Serial data output
Serial data input
Sample clock output
Infrared LED drive output (UART1)
Photo diode input (UART1)
RS232 UART1 and 2 TX outputs
RS232 UART1 and 2 RX inputs
RS232 DSR input
RS232 DCD input
RS232 CTS input
LCD serial display data; pins can be used on power up to read the ID of some
LCD modules (See
Table 6
).
LCD line clock
LCD pixel clock
LCD frame synchronization pulse output
LCD AC bias drive
Keyboard column drives (SYSCON1)
Buzzer drive output (SYSCON1)
LED flasher driver
—
multiplexed with Port D bit 0. This pin can provide up to
4 mA of drive current.
Port A I/O (bit 6 for boot clock option, bit 7 for CL-PS6700 PRDY input); also
used as keyboard row inputs
Port B I/O. All eight Port B bits can be used as GPIOs.
When the PC CARD1 or 2 control bits in the SYSCON2 register are de-
asserted, PB[0] and PB[1] are available for GPIO. When asserted, these port
bits are used as the PRDY signals for connected CL-PS6700 PC Card Host
Adapter devices.
Port D I/O
Port E I/O (3 bits only). Can be used as general purpose I/O during normal
operation.
During power-on reset, PE[0] and PE[1] are inputs and are latched by the ris-
ing edge of nPOR to select the memory width that the EP7209 will use to read
from the boot code storage device (i.e., external 8-bit-wide FLASH bank).
During power-on reset, PE[2] is latched by the rising edge of nPOR to select
the clock mode of operation (i.e., either the PLL or external 13 MHz clock
mode).
PWM drive outputs. These pins are inputs on power up to determine what
polarity the output of the PWM should be when active. Otherwise, these pins
are always an output (See
Table 6
).
PWM feedback inputs
IrDA and
RS232
Interfaces
LCD
DD[0:3]
I/O
CL[1]
CL[2]
FRM
M
COL[0:7]
BUZ
PD[0]/
LEDFLSH
O
O
O
O
O
O
Keyboard &
Buzzer drive
LED Flasher
O
General
Purpose I/O
PA[0:7]
I/O
PB[0]/PRDY1
PB[1]/PRDY2
PB[2:7]
I/O
PD[0:7]
PE[0]/
BOOTSEL[0]
I/O
I/O
PE[1]/
BOOTSEL[1]
I/O
PE[2]/
CLKSEL
I/O
PWM
Drives
DRIVE[0:1]
I/O
FB[0:1]
I
Function
Signal
Name
Signal
Description
Table 4. External Signal Functions
(cont.)