參數(shù)資料
型號(hào): ENC624J600T-I/PT
廠商: Microchip Technology
文件頁數(shù): 46/168頁
文件大?。?/td> 0K
描述: IC ETHERNET CTRLR W/SPI 64-TQFP
視頻文件: Fast 100 Mbps Ethernet PICtail Plus Overview
標(biāo)準(zhǔn)包裝: 1,200
控制器類型: 以太網(wǎng)控制器(IEEE 802.3)
接口: SPI
電源電壓: 3 V ~ 3.6 V
電流 - 電源: 96mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-TQFP
供應(yīng)商設(shè)備封裝: 64-TQFP(10x10)
包裝: 帶卷 (TR)
配用: AC164132-ND - BOARD DAUGHTER PICTAIL ETHERNET
PIC16CR7X
DS21993C-page 12
2007 Microchip Technology Inc.
PORTD is a bidirectional I/O port or parallel slave port
when interfacing to a microprocessor bus.
RD0/PSP0
RD0
PSP0
19
21
38
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
RD1/PSP1
RD1
PSP1
20
22
39
I
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
RD2/PSP2
RD2
PSP2
21
23
40
I
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
RD3/PSP3
RD3
PSP3
22
24
41
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
RD4/PSP4
RD4
PSP4
27
30
2
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
RD5/PSP5
RD5
PSP5
28
31
3
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
RD6/PSP6
RD6
PSP6
29
32
4
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
RD7/PSP7
RD7
PSP7
30
33
5
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
PORTE is a bidirectional I/O port.
RE0/AN5/RD/
RE0
AN5
RD
89
25
I/O
I
ST/TTL(3)
Digital I/O.
Analog input 5.
Read control for parallel slave port .
RE1/AN6/WR/
RE1
AN6
WR
910
26
I/O
I
ST/TTL(3)
Digital I/O.
Analog input 6.
Write control for parallel slave port .
RE2/AN7/CS
RE2
AN7
CS
10
11
27
I/O
I
ST/TTL(3)
Digital I/O.
Analog input 7.
Chip Select control for parallel slave port .
VSS
12,31
13,34
6,29
P
Ground reference for logic and I/O pins.
VDD
11,32
12,35
7,28
P
Positive supply for logic and I/O pins.
NC
1,17,
28, 40
12,13,
33, 34
These pins are not internally connected. These pins should
be left unconnected.
TABLE 1-3:
PIC16CR74 AND PIC16CR77 PINOUT DESCRIPTION (CONTINUED)
Pin Name
PDIP
Pin#
PLCC
Pin#
QFP
Pin#
I/O/P
Type
Buffer
Type
Description
Legend:
I = input
O = output
I/O = input/output
P = power
— = Not used
TTL = TTL input
ST = Schmitt Trigger input
Note
1:
This buffer is a Schmitt Trigger input when configured as an external interrupt.
2:
This buffer is a Schmitt Trigger input when used in Serial Verify mode.
3:
This buffer is a Schmitt Trigger input when configured as general purpose I/O and a TTL input when used in the Parallel
Slave Port mode (for interfacing to a microprocessor bus).
4:
This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.
相關(guān)PDF資料
PDF描述
EP1AGX90EF1152I6 IC ARRIA GX FPGA 90K 1152FBGA
EP1C3T144A8N IC CYCLONE FPGA 2910 LE 144-TQFP
EP1K100FC484-1N IC ACEX 1K FPGA 100K 484-FBGA
EP1S80F1020C5N IC STRATIX FPGA 80K LE 1020-FBGA
EP1SGX40GF1020I6 IC STRATIX GX FPGA 40K 1020-FBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ENC680D05B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
ENC680D-05B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:STD MOV
ENC680D07B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
ENC680D-07B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:STD MOV
ENC680D10B 制造商:未知廠家 制造商全稱:未知廠家 功能描述: