參數(shù)資料
型號(hào)： DSP56600
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： Implementing Viterbi Decoders Using the VSL Instruction on DSP Families
中文描述： 維特比解碼器實(shí)現(xiàn)上使用DSP的家庭教學(xué)的VSL
文件頁(yè)數(shù)： 77/108頁(yè)
文件大?。?/td> 726K
代理商： DSP56600
Basic Algorithm Program Listing
Viterbi Decoder Implementation
For More Information On This Product,
Go to: www.freescale.com
A-9
;**********************MEMORY ORGANIZATION****************************
;
MOST OF THE MEMORY LOCATION IS IMPORTANT--THE FIRST TWO
;
LABELS OF THE X AND Y DATA MEMORY ARE PAIRED AND MUST
;
BE CO LOCATED (AT THE SAME ADDRESSES). IN ADDITION, STATE1
;
AND STATE2 MUST BE LOCATED ON A 0 MOD 2*NUMSTATES BOUNDARY,
;
X and Y memory for input data must be paired --GOOD LUCK.....
;*****************************************************************************
;*********************************************************************
;
org
x:$0
STATE1
DC
$0ff,$0,$0,$0,$0,$0,$0,$0,0,0,0,0,0,0,0,0
DC
$0,$0,$0,$0,$0,$0,$0,$0,0,0,0,0,0,0,0,0
STATE2
DC
$0ff,$0,$0,$0,$0,$0,$0,$0,0,0,0,0,0,0,0,0
DC
$0,$0,$0,$0,$0,$0,$0,$0,0,0,0,0,0,0,0,0
;
PATHOUT DS
NUMSTATES*(NUMINPUTS/8+1)
INDATA ;THIS DATA ENCODES
$1234,$5678,$9abc,$4973,$7925,$3491,$ad43,$ff21,$7ebb,$0100,$20
DC
$a000,$a000,$a000,$6000,$6000,$a000,$a000,$6000
DC
$6000,$6000,$6000,$6000,$6000,$a000,$a000,$6000
DC
$a000,$6000,$a000,$6000,$a000,$6000,$a000,$6000
DC
$a000,$a000,$6000,$6000,$6000,$a000,$a000,$a000
DC
$a000,$a000,$a000,$a000,$a000,$a000,$a000,$a000
DC
$a000,$6000,$6000,$a000,$a000,$a000,$a000,$a000
DC
$a000,$a000,$a000,$a000,$a000,$6000,$6000,$a000
DC
$6000,$a000,$6000,$a000,$6000,$6000,$6000,$6000
DC
$a000,$a000,$6000,$6000,$a000,$a000,$a000,$6000
DC
$a000,$6000,$a000,$6000,$6000,$a000,$6000,$a000
DC
$a000,$a000,$6000,$a000,$a000,$a000,$a000,$6000
DC
$6000,$6000,$6000,$a000,$6000,$6000,$6000,$6000
DC
$6000,$6000,$a000,$a000,$a000,$a000,$6000,$6000
DC
$a000,$a000,$6000,$a000,$a000,$a000,$a000,$a000
DC
$a000,$6000,$6000,$a000,$a000,$a000,$a000,$a000
DC
$6000,$a000,$6000,$a000,$6000,$6000,$a000,$a000
DC
$6000,$6000,$6000,$a000,$a000,$6000,$a000,$6000
DC
$6000,$6000,$a000,$a000,$a000,$6000,$a000,$a000
DC
$a000,$a000,$6000,$6000,$6000,$a000,$a000,$6000
DC
$6000,$a000,$6000,$a000,$6000,$a000,$a000,$a000
DC
$a000,$a000,$6000,$6000,$a000,$6000,$a000,$6000
;*****************************************************************************
Example A-1
Basic 16-Bit Implementation of a Viterbi Decoder (Continued)
F
Freescale Semiconductor, Inc.
n
.
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSP56600AD 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:INTERGRATED CELLULAR BASEBAND PROCESSOR DEVELOPMENT IC
DSP56600FM 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-BIT DIGITAL SIGNAL PROCESSOR
DSP56602 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:16-Bit Digital Signal Processor User manual
DSP56602AD 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:16-Bit Digital Signal Processor User manual
DSP56602DS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP56602 16-Bit Digital Signal Processor Datasheet
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