參數(shù)資料
型號: DSP56600
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Implementing Viterbi Decoders Using the VSL Instruction on DSP Families
中文描述: 維特比解碼器實現(xiàn)上使用DSP的家庭教學(xué)的VSL
文件頁數(shù): 52/108頁
文件大?。?/td> 726K
代理商: DSP56600
4-4
Viterbi Decoder Implementation
For More Information On This Product,
Go to: www.freescale.com
Algorithmic Extensions
Allowing More General Branch Metrics
4.2.1
Modify Viterbi Butterfly
Begin modification with the butterfly loop. The code from
Section 3
reads in the branch
metric from y memory near the loop end (the y:(r0)+,y1 that appears two lines
from _P_NextStage). The easiest way to get two branch metrics is to do long reads on the
branch metrics. For the code in
Section 3
, however, finding the space to do the extra
branch read is harder. Most of the data movement is tightly controlled and cannot be
moved in the code without disrupting the data flow. Instead, we can make use of the
pipeline stall in the Viterbi butterfly loop. The modified code appears in
Example 4-1
.
Example 4-1
Modified Viterbi Butterfly
;*******************viterbi add, compare, select butterfly macro***
;
FUNCTION: Update path metrics/paths for the Viterbi algorithm by
;
doing an add,compare,select update for state pairs.
;
INPUTS:
;
r2 should point to the beginning of the branch metric table
;
r2 should point to the beginning of the branch metric table
;
r5 should point to the latest path metric for state 0
;
r4 should point to the storage location for updated state 0
;
n5 should offset addresses by NUMSTATES/2
;
OUTPUTS:
;
Updated path metrics/paths stored in XY memory
;
REGISTERS USED:
;
a,b,y01,r2,r4,r5,n5 r2 unchanged (modulo req'd)
;
Registers:
;
r5, pointer to the path metric/path table, arranged as
;
x: path metric, y: path,states ordered assuming
;
bits shift right to left.
;
r4, pointer to the output path metric/path table
;
r0, pointer to the branch metric table, arranged
;
as x:C, y:D, CD,CD,CD, etc.
;
;
SA------NSA
;
\ C /
;
D \ /
;
\/
;
/\
;
D / \
;
/ \
;
SB------NSB
;
C
F
Freescale Semiconductor, Inc.
n
.
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