參數(shù)資料
型號(hào)： DSP56600
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： Implementing Viterbi Decoders Using the VSL Instruction on DSP Families
中文描述： 維特比解碼器實(shí)現(xiàn)上使用DSP的家庭教學(xué)的VSL
文件頁(yè)數(shù)： 23/108頁(yè)
文件大小： 726K
代理商： DSP56600
The Viterbi Algorithm
Viterbi Decoder
Viterbi Decoder Implementation
For More Information On This Product,
Go to: www.freescale.com
2-9
To understand why this is so, note that the total path metric for
Similarly,
has path metric PM1+QM2,
has path metric PM2+QM2. Suppose
metric. Then
is still larger, as PM1+QM2 >PM2+QM2 (remembering we
assumed that PM1 >PM2). This is true for
any
Q2. So, if PM1 > PM2, we can eliminate P2
from further consideration at time j,
without waiting for the òfutureó inputs from time j to
time k
.
is PM1+QM1.
has path metric PM2+QM1, and
is a candidate for largest path
Figure 2-5
Using Intermediate States to Eliminate Partial Paths
In our example, each state will have two paths entering it at any time. The number of
paths doubles each time, but we can now eliminate half of the paths each time as well.
This is the basis of the Viterbi algorithm. To use it, we must keep track of the best path
metric for each state up to the current time. By eliminating paths that can never have the
largest path metric, however, we keep the amount of computation constant with time.
To diagram what is going on, we need a different figure than the tree in
Figure 2-3
. We
need only keep track of each (encoder) state at each time. The result is called a trellis
because it resembles one. A diagram of a trellis for our IS-136 code appears in
Figure 2-6
.
The beginning of the trellis does not look the same for each time (each decoder input is a
stage
in the diagram). This is because we assumed the encoder started in state 00000. In
general, the encoder can be in any state, and the trellis repeats. For our figure, this can be
seen in stages 6 and 7 (after 5 stages, our encoder can be in any state, so we get a òsteady
stateó in our trellis diagram). Each line in the trellis is a transition, just like the ones in the
tree. For the trellis, however, the number of states is bounded. The number of states for
this trellis is determined by the encoder which has five state bits. This means there are
2
5
= 32 states in the trellis.
P
1
Q
1
è
P
1
Q
2
è
P
2
P
2
Q
1
Q
2
è
è
P
2
Q
2
è
P
1
Q
2
è
State S
P1
P2
Q1
Q2
time i
time j
time k
F
Freescale Semiconductor, Inc.
n
.
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