參數(shù)資料
型號(hào)： DSP56600
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述： Implementing Viterbi Decoders Using the VSL Instruction on DSP Families
中文描述： 維特比解碼器實(shí)現(xiàn)上使用DSP的家庭教學(xué)的VSL
文件頁數(shù)： 72/108頁
文件大?。?/td> 726K
代理商： DSP56600
A-4
Viterbi Decoder Implementation
For More Information On This Product,
Go to: www.freescale.com
Basic Algorithm Program Listing
Example A-1
Basic 16-Bit Implementation of a Viterbi Decoder
OPT
mex
;***********************VITERBI DECODER***********************************
; THIS ROUTINE IMPLEMENTS A CONVOLUTIONAL DECODER USING THE VITERBI ALG.
; IT IS OPTIMIZED FOR SPEED, WHICH MEANS THAT EVERY ALU REGISTER
; AND ALL OF THE R REGISTERS ARE USED. A SIGNIFICANT AMOUNT OF
; THESE CAN BE FREED BY STORING AND REUSING REGISTERS BETWEEN THE
; FINDMETRICS ROUTINES AND THE ACS,ACSFlush ROUTINES.
;
INPUT is in INDATA real in x imag in y. OUTPUT begins at y:DECOUT
;*****************BRANCH METRIC MACRO*************************************
;
FUNCTION: Input data and generate branch metrics.
;
For this decoder, the metric is a scaled
;
sum or difference of the real and imag inputs.
;
INPUTS:
;
r2 should point to the beginning of the branch metric table
;
r5 should point to the latest path metric for state 0
;
r1 should point to the next input XY data pair
;
OUTPUTS:
;
Branch metrics are stored at BRX in XY memory
;
REGISTERS USED:
;
a,b,x01,y01,r1,r2,n2, r2 unchanged (modulo req'd)
;****************************************************************
FindMetrics macro
move
l:(r1)+,y
move
#-16,x1
mpy
x1,y1,a
move
#BRY+3,r2
mac
x1,y0,a
a,b
mac
-x1,y0,b
;
;grab dec input
;sign for real component, 0 sent.
;a has 0x partial branch
;storage for generated branch metrics
;a gets 00 branch
;b has 01 branch
neg
neg
a
b
a,x1
b,x0
a,y:(r2)+n2 ;mv 00 to x1,11 to a, st 00 in location 3
b,y:(r2)+n2 ;mv 01 to x0,10 to b, st 01 in location 6
;*****************************************************************************
;
AT this point X1 has 00, X0 has 01,
;
A1 has 11, B1 has 10, needed for quick storage in Y memory
;*****************************************************************************
move
x1,y:(r2)+n2
move
x0,y:(r2)+n2
move
b,y:(r2)+n2
move
b,y:(r2)+n2
move
b,y:(r2)+n2
move
b,y:(r2)+n2
move
x0,y:(r2)+n2
move
x1,y:(r2)+n2
move
x0,y:(r2)+n2
move
x1,y:(r2)+n2
move
a,y:(r2)+n2
move
a,y:(r2)+n2
move
a,y:(r2)+n2
move
a,y:(r2)
endm
;store 00 in location 9
;store 01 in location 12
;store 10 in location 15
;store 10 in location 2
;store 10 in location 5
;store 10 in location 8
;store 01 in location 11
;store 00 in location 14
;store 01 in location 1
;store 00 in location 4
;store 11 in location 7
;store 11 in location 10
;store 11 in location 13
;store 11 in location 0. r2-> BRY
F
Freescale Semiconductor, Inc.
n
.
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