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參數(shù)資料
| 型號： | DSP56600 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | Implementing Viterbi Decoders Using the VSL Instruction on DSP Families |
| 中文描述： | 維特比解碼器實現(xiàn)上使用DSP的家庭教學(xué)的VSL |
| 文件頁數(shù)： | 67/108頁 |
| 文件大?。?/td> | 726K |
| 代理商： | DSP56600 |
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Summary
Summary
Viterbi Decoder Implementation
For More Information On This Product,
Go to: www.freescale.com
5-3
5.1
SUMMARY
This application report began with an explanation of the Viterbi algorithm in
Section 2
,
introduced a basic Viterbi decoder in
Section 3
, and offered some enhancements to the
decoding assembly code in
Section 4
. The explanations in
Section 2
and
Section 3
are
detailed enough for the ideas behind the code to be understood. The goal is to make it
easy to take and modify this code to produce efficient code for any desired application of
the Viterbi algorithm.
We chose a nontrivial industry standard code as our example, and there are some
statistics that are worth noting.
Table 5-1
presents some notable statistics for code
presented in this note. In the table, we compare the basic Viterbi decoder code of
Section 3
with the basic code in
Section 4
. The basic code requires about 215 clock cycles
per decoder input to decoder the data. As an example, this means that at a received data
rate of 13,350 per second (the IS-136 rate if all six slots in a frame are voice data to be
decoded) 2.87 MIPS are required.
If we use generalized branch metrics, the numbers increase, because the branch metric
calculation is more complicated. Note, however, that they lower again as the Pre ACS
and ACSFlush routines are included. Once all the enhancements of
Section 4
are
included, the computational load drops to 2.81 MIPS, more than 3% below what the rate
would be if we just used the generalized branch metrics.
5.2
CONCLUSIONS
In conclusion, note that the relative improvement is dependent on the length of the data
packet. Shorter packets show greater improvement. For example, an encoded voice data
slot in IS-136 uses a packet size of only 89 decoder inputs instead of our example 168. For
packets of this size, the percent change is 4.8%large enough to make the extra code
worth considering.
F
Freescale Semiconductor, Inc.
n
.
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