參數(shù)資料
型號(hào): DSP56366P
廠(chǎng)商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
元件分類(lèi): 數(shù)字信號(hào)處理
英文描述: 24-Bit Audio Digital Signal Processor
中文描述: 24位音頻數(shù)字信號(hào)處理器
文件頁(yè)數(shù): 57/110頁(yè)
文件大?。?/td> 1273K
代理商: DSP56366P
DSP56366 Technical Data, Rev. 3.1
Freescale Semiconductor
3-31
Table 3-16 DRAM Out-of-Page and Refresh Timings, Fifteen Wait States
1, 2
No.
Characteristics
3
Symbol
Expression
Min
Max
Unit
157
Random read or write cycle time
t
RC
16
×
T
C
133.3
ns
158
RAS assertion to data valid (read)
t
RAC
8.25
×
T
C
5.7
63.0
ns
159
CAS assertion to data valid (read)
t
CAC
4.75
×
T
C
5.7
33.9
ns
160
Column address valid to data valid (read)
t
AA
5.5
×
T
C
5.7
40.1
ns
161
CAS deassertion to data not valid (read hold time)
t
OFF
0.0
0.0
ns
162
RAS deassertion to RAS assertion
t
RP
6.25
×
T
C
4.0
48.1
ns
163
RAS assertion pulse width
t
RAS
9.75
×
T
C
4.0
77.2
ns
164
CAS assertion to RAS deassertion
t
RSH
6.25
×
T
C
4.0
48.1
ns
165
RAS assertion to CAS deassertion
t
CSH
8.25
×
T
C
4.0
64.7
ns
166
CAS assertion pulse width
t
CAS
4.75
×
T
C
4.0
35.6
ns
167
RAS assertion to CAS assertion
t
RCD
3.5
×
T
C
±
2
27.2
31.2
ns
168
RAS assertion to column address valid
t
RAD
2.75
×
T
C
±
2
20.9
24.9
ns
169
CAS deassertion to RAS assertion
t
CRP
7.75
×
T
C
4.0
60.6
ns
170
CAS deassertion pulse width
t
CP
6.25
×
T
C
4.0
48.1
ns
171
Row address valid to RAS assertion
t
ASR
6.25
×
T
C
4.0
48.1
ns
172
RAS assertion to row address not valid
t
RAH
2.75
×
T
C
4.0
18.9
ns
173
Column address valid to CAS assertion
t
ASC
0.75
×
T
C
4.0
2.2
ns
174
CAS assertion to column address not valid
t
CAH
6.25
×
T
C
4.0
48.1
ns
175
RAS assertion to column address not valid
t
AR
9.75
×
T
C
4.0
77.2
ns
176
Column address valid to RAS deassertion
t
RAL
7
×
T
C
4.0
54.3
ns
177
WR deassertion to CAS assertion
t
RCS
5
×
T
C
3.8
37.9
ns
178
CAS deassertion to WR
4
assertion
t
RCH
1.75
×
T
C
3.7
10.9
ns
179
RAS deassertion to WR
5
assertion
t
RRH
0.25
×
T
C
2.0
0.1
ns
180
CAS assertion to WR deassertion
t
WCH
6
×
T
C
4.2
45.8
ns
181
RAS assertion to WR deassertion
t
WCR
9.5
×
T
C
4.2
75.0
ns
182
WR assertion pulse width
t
WP
15.5
×
T
C
4.5
124.7
ns
183
WR assertion to RAS deassertion
t
RWL
15.75
×
T
C
4.3
126.9
ns
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