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參數(shù)資料
| 型號： | DSP56366P |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 24-Bit Audio Digital Signal Processor |
| 中文描述： | 24位音頻數(shù)字信號處理器 |
| 文件頁數(shù)： | 11/110頁 |
| 文件大?。?/td> | 1273K |
| 代理商： | DSP56366P |
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DSP56366 Technical Data, Rev. 3.1
Freescale Semiconductor
2-7
BG
Input
Ignored Input
Bus Grant
—BG is an active-low input. BG is asserted by an external bus
arbitration circuit when the DSP56366 becomes the next bus master. When BG
is asserted, the DSP56366 must wait until BB is deasserted before taking bus
mastership. When BG is deasserted, bus mastership is typically given up at the
end of the current bus cycle. This may occur in the middle of an instruction that
requires more than one external bus cycle for execution.
For proper BG operation, the asynchronous bus arbitration enable bit (ABE) in
the OMR register must be set.
BB
Input/Output
Input
Bus Busy
—BB is a bidirectional active-low input/output. BB indicates that the
bus is active. Only after BB is deasserted can the pending bus master become
the bus master (and then assert the signal again). The bus master may keep
BB asserted after ceasing bus activity regardless of whether BR is asserted or
deasserted. This is called “bus parking” and allows the current bus master to
reuse the bus without rearbitration until another device requires the bus. The
deassertion of BB is done by an “active pull-up” method (i.e., BB is driven high
and then released and held high by an external pull-up resistor).
For proper BB operation, the asynchronous bus arbitration enable bit (ABE) in
the OMR register must be set.
BB requires an external pull-up resistor.
Table 2-7 External Bus Control Signals (continued)
Signal Name
Type
State during
Reset
Signal Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSP56366UM | 24-Bit Audio Digital Signal Processor |
| DSP56367P | 24-Bit Audio Digital Signal Processor |
| DSP56367UM | 24-Bit Audio Digital Signal Processor |
| DSP56600 | Implementing Viterbi Decoders Using the VSL Instruction on DSP Families |
| DSP56852E | 16-bit Digital Signal Controllers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56366UM | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:24-Bit Audio Digital Signal Processor |
| DSP56367 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Optoelectronic |
| DSP56367P | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:24-Bit Audio Digital Signal Processor |
| DSP56367UM | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:24-Bit Audio Digital Signal Processor |
| DSP56371 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:high density CMOS device |
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