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參數(shù)資料
| 型號： | DSP56366P |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 24-Bit Audio Digital Signal Processor |
| 中文描述： | 24位音頻數(shù)字信號處理器 |
| 文件頁數(shù)： | 3/110頁 |
| 文件大小： | 1273K |
| 代理商： | DSP56366P |
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Overview
DSP56366 Technical Data, Rev. 3.1
Freescale Semiconductor
1-3
1.1
Features
1.1.1
DSP56300 Modular Chassis
120 Million Instructions Per Second (MIPS) with an 120 MHz clock at 3.3V.
Object Code Compatible with the 56K core.
Data ALU with a 24 x 24 bit multiplier-accumulator and a 56-bit barrel shifter. 16-bit arithmetic
support.
Program Control with position independent code support and instruction cache support.
Six-channel DMA controller.
PLL based clocking with a wide range of frequency multiplications (1 to 4096), predivider factors
(1 to 16) and power saving clock divider (2
i
: i=0 to 7). Reduces clock noise.
Internal address tracing support and OnCE
for Hardware/Software debugging.
JTAG port.
Very low-power CMOS design, fully static design with operating frequencies down to DC.
STOP and WAIT low-power standby modes.
1.1.2
On-chip Memory Configuration
7Kx24 Bit Y-Data RAM and 8Kx24 Bit Y-Data ROM.
13Kx24 Bit X-Data RAM and 32Kx24 Bit X-Data ROM.
40Kx24 Bit Program ROM.
3Kx24 Bit Program RAM and 192x24 Bit Bootstrap ROM. 1K of Program RAM may be used as
Instruction Cache or for Program ROM patching.
2Kx24 Bit from Y Data RAM and 5Kx24 Bit from X Data RAM can be switched to Program RAM
resulting in up to 10Kx24 Bit of Program RAM.
1.1.3
Off-chip Memory Expansion
External Memory Expansion Port.
Off-chip expansion up to two 16M x 24-bit word of Data memory.
Off-chip expansion up to 16M x 24-bit word of Program memory.
Simultaneous glueless interface to SRAM and DRAM.
1.1.4
Peripheral Modules
Serial Audio Interface (ESAI): up to 4 receivers and up to 6 transmitters, master or slave. I
2
S, Sony,
AC97, network and other programmable protocols.
Serial Audio Interface I(ESAI_1): up to 4 receivers and up to 6 transmitters, master or slave. I
2
S,
Sony, AC97, network and other programmable protocols
The ESAI_1 shares four of the data pins with ESAI, and ESAI_1 does NOT support HCKR and
HCKT (high frequency clocks)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSP56366UM | 24-Bit Audio Digital Signal Processor |
| DSP56367P | 24-Bit Audio Digital Signal Processor |
| DSP56367UM | 24-Bit Audio Digital Signal Processor |
| DSP56600 | Implementing Viterbi Decoders Using the VSL Instruction on DSP Families |
| DSP56852E | 16-bit Digital Signal Controllers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56366UM | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:24-Bit Audio Digital Signal Processor |
| DSP56367 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Optoelectronic |
| DSP56367P | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:24-Bit Audio Digital Signal Processor |
| DSP56367UM | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:24-Bit Audio Digital Signal Processor |
| DSP56371 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:high density CMOS device |
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