參數(shù)資料
型號： DSP56364P
廠商： 飛思卡爾半導體(中國)有限公司
元件分類： 數(shù)字信號處理
英文描述： 24-Bit Audio Digital Signal Processor
中文描述： 24位音頻數(shù)字信號處理器
文件頁數(shù)： 48/148頁
文件大小： 1204K
代理商： DSP56364P
External Memory Expansion Port (Port A)
DSP56364 Technical Data, Rev. 4
3-32
Freescale Semiconductor
164
CAS assertion to RAS deassertion
t
RSH
5.25
×
T
C
4.0
48.5
—
ns
165
RAS assertion to CAS deassertion
t
CSH
6.25
×
T
C
4.0
58.5
—
ns
166
CAS assertion pulse width
t
CAS
3.75
×
T
C
4.0
33.5
—
ns
167
RAS assertion to CAS assertion
t
RCD
2.5
×
T
C
±
4.0
21.0
29.0
ns
168
RAS assertion to column address valid
t
RAD
1.75
×
T
C
±
4.0
13.5
21.5
ns
169
CAS deassertion to RAS assertion
t
CRP
5.75
×
T
C
4.0
53.5
—
ns
170
CAS deassertion pulse width
t
CP
4.25
×
T
C
4.0
38.5
—
ns
171
Row address valid to RAS assertion
t
ASR
4.25
×
T
C
4.0
38.5
—
ns
172
RAS assertion to row address not valid
t
RAH
1.75
×
T
C
4.0
13.5
—
ns
173
Column address valid to CAS assertion
t
ASC
0.75
×
T
C
4.0
3.5
—
ns
174
CAS assertion to column address not valid
t
CAH
5.25
×
T
C
4.0
48.5
—
ns
175
RAS assertion to column address not valid
t
AR
7.75
×
T
C
4.0
73.5
—
ns
176
Column address valid to RAS deassertion
t
RAL
6
×
T
C
4.0
56.0
—
ns
177
WR deassertion to CAS assertion
t
RCS
3.0
×
T
C
4.0
26.0
—
ns
178
CAS deassertion to WR
5
assertion
t
RCH
1.75
×
T
C
4.0
13.5
—
ns
179
RAS deassertion to WR
5
assertion
t
RRH
0.25
×
T
C
2.0
0.5
—
ns
180
CAS assertion to WR deassertion
t
WCH
5
×
T
C
4.2
45.8
—
ns
181
RAS assertion to WR deassertion
t
WCR
7.5
×
T
C
4.2
70.8
—
ns
182
WR assertion pulse width
t
WP
11.5
×
T
C
4.5
110.5
—
ns
183
WR assertion to RAS deassertion
t
RWL
11.75
×
T
C
4.3
113.2
—
ns
184
WR assertion to CAS deassertion
t
CWL
10.25
×
T
C
4.3
103.2
—
ns
185
Data valid to CAS assertion (write)
t
DS
5.75
×
T
C
4.0
53.5
—
ns
186
CAS assertion to data not valid (write)
t
DH
5.25
×
T
C
4.0
48.5
—
ns
187
RAS assertion to data not valid (write)
t
DHR
7.75
×
T
C
4.0
73.5
—
ns
188
WR assertion to CAS assertion
t
WCS
6.5
×
T
C
4.3
60.7
—
ns
189
CAS assertion to RAS assertion (refresh)
t
CSR
1.5
×
T
C
4.0
11.0
—
ns
190
RAS deassertion to CAS assertion (refresh)
t
RPC
2.75
×
T
C
4.0
23.5
—
ns
Table 3-15 DRAM Out-of-Page and Refresh Timings, Eleven Wait States
1, 2
(continued)
No.
Characteristics
3
Symbol
Expression
4
Min
Max
Unit
相關(guān)PDF資料
PDF描述
DSP56366P 24-Bit Audio Digital Signal Processor
DSP56366UM 24-Bit Audio Digital Signal Processor
DSP56367P 24-Bit Audio Digital Signal Processor
DSP56367UM 24-Bit Audio Digital Signal Processor
DSP56600 Implementing Viterbi Decoders Using the VSL Instruction on DSP Families
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSP56364UM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP56364 24-Bit Digital Signal Processor User＇s Manual
DSP56366 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP56366 24-Bit Audio Digital Signal Processor
DSP56366P 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:24-Bit Audio Digital Signal Processor
DSP56366UM 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:24-Bit Audio Digital Signal Processor
DSP56367 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Optoelectronic
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