參數(shù)資料
型號： DS80CH11
英文描述： System Energy Manager
中文描述： 系統(tǒng)能量管理器
文件頁數(shù)： 59/88頁
文件大?。?/td> 598K
代理商： DS80CH11
DS80CH11
011200 59/88
10.0 KEYBOARD SCANNING PORTS
10.1 OVERVIEW
Three 8–bit I/O ports are provided which can be used for
key matrix scan line outputs and inputs. Ports 8 and 9
are intended for scan line outputs, while port 4 is
intended for scan line inputs.
10.2 KEY SCAN OUTPUTS
Ports 8 and 9 together provide 16 open–drain lines
which are intended for use as key scan outputs. These
lines are logically accessed and operated as normal
pseudo–bi–directional I/O port pins. As a result, lines
which are not required for the key scan function can be
used as general purpose I/O for the control of other
functions.
10.3 KEY SCAN INPUTS
Port 4 is a parallel I/O port which is logically and electri-
cally tailored for keyboard matrix scan inputs. All of the
port 4 pins are Schmitt triggered inputs and are inter-
nally pulled high by a resistor. In addition, all pins are
10.4 KDE – KEY DETECT ENABLE REGISTER
capable of generating an interrupt on a low–going tran-
sition. As a result, the SEM can initiate a keyboard scan
only when a key is pressed instead of doing it periodi-
cally. Thus, battery drain is minimized.
In order to use a Port 4 pin as a key scan input, its output
latch bit in the Port 4 SFR register must be first written to
a 1, which configures the pin as an input. Negative tran-
sition detection on each pin is enabled by setting the
matching KDEn enable bit in the Keyboard Detect
Enable Register to a 1. Then, when a negative transi-
tion occurs on an enabled input, the corresponding
interrupt flag bit will be set in the Keyboard Detect Flag
Register. If the Key Detect Interrupt Enable bit is set
(EKD; register EIE.5), a keyboard interrupt will then be
recognized by the SEM core. Upon interrupt, the sys-
tem should scan the keyboard matrix via other output
ports (typically ports 8 and 9) to identify the location of
the pressed key. The set keyboard interrupt flag bits
should be cleared by firmware to clear the interrupt
condition before exiting the interrupt service routine.
KDE; SFR ADDR.=0A5H
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
KDE7
KDE6
KDE5
KDE4
KDE3
KDE2
KDE1
KDE0
Read/Write Access: Unrestricted.
Initialization: Undefined on any type of reset
KDE7–KDE0 – Key Detect Enable Bits
When a KDEn enable bit is set, it enables negative–
edge transition detection on the corresponding line of
port 4. When a KDEn bit is cleared no transition detec-
tion is performed on the corresponding line.
10.5 KDF – KEYBOARD DETECT FLAG REGISTER
KDF; SFR ADDR.=0A6H
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
KDF7
KDF6
KDF5
KDF4
KDF3
KDF2
KDF1
KDF0
Read/Write Access: Unrestricted read; all bits write only to 0.
Initialization: 00H on any type of reset
KDFn are flag bits for the keyboard activity detection. If
a port 4–pin has its KDEn bit set, the corresponding
KDFn is set when an negative edge is detected on that
pin. An SEM interrupt will be recognized if the KDEn bit
is set and the interrupts are enabled. Upon receipt of the
interrupt, the system should read this register to deter-
mine on which scan line the key closure occurred. The
firmware can then scan the keyboard matrix using Ports
8 and 9 as outputs to identify the location of the
depressed key. In order to clear the interrupt condition,
the firmware should clear the interrupting KDF bit(s) by
writing 00H to the KDF register prior to exiting the inter-
rupt service routine.
相關(guān)PDF資料
PDF描述
DS83C520 EPROM/ROM High-Speed Micro
DS83C520-ECL EPROM/ROM High-Speed Micro
DS83C520-ENL EPROM/ROM High-Speed Micro
DS83C520-MCL EPROM/ROM High-Speed Micro
DS83C520-MNL EPROM/ROM High-Speed Micro
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS80CH11+E02 制造商:Maxim from Components Direct 功能描述:MAXIM DS80CH11+E02 SYSTEM ENERGY MANAGERS - Trays 制造商:Maxim 功能描述:Maxim DS80CH11+E02 System Energy Managers
DS80CH11-E02 制造商:Maxim from Components Direct 功能描述:MAXIM DS80CH11-E02 SYSTEM ENERGY MANAGERS - Trays 制造商:Maxim 功能描述:Maxim DS80CH11-E02 System Energy Managers
DS80E100 制造商:NSC 制造商全稱:National Semiconductor 功能描述:5 to 12.5 Gbps, Power-Saver Equalizer for Backplanes and Cables
DS80EP100 制造商:NSC 制造商全稱:National Semiconductor 功能描述:5 to 12.5 Gbps, Power-Saver Equalizer for Backplanes and Cables
DS80EP100_08 制造商:NSC 制造商全稱:National Semiconductor 功能描述:5 to 12.5 Gbps, Power-Saver Equalizer for Backplanes and Cables
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*