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參數(shù)資料
| 型號： | DS80CH11 |
| 英文描述： | System Energy Manager |
| 中文描述： | 系統(tǒng)能量管理器 |
| 文件頁數(shù)： | 48/88頁 |
| 文件大?。?/td> | 598K |
| 代理商： | DS80CH11 |
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DS80CH11
011200 48/88
WINDOW COMPARATOR OPERATION
Figure 7–3
WCIO = 0
3FFH
WCIO = 1
3FFH
000H
000H
WINHI
WINLO
WINHI
WINLO
WINHI
VALUE
WINLO
VALUE
WCM
(WCIO=0)
WCM
(WCIO=1)
WINDOW
STATUS
>ADR9–2
>ADR9–2
0
1
Outside
>ADR9–2
<ADR9–2
1
0
Inside
<ADR9–2
>ADR9–2
1
0
Inside
<ADR9–2
<ADR9–2
0
1
Outside
Note that there is no hardware significance to upper and lower designations. The upper comparison value can be
selected as less than the lower comparison value, although doing so provides no additional function.
7.7
Prior to initiating a conversion, software must select
several parameters. First, the conversion channel must
be selected. The next selection is whether this signal
will be constantly monitored or simply converted once.
Thus, software chooses continuous conversion or
single shot. The window comparator can then be pro-
grammed to look for particular result ranges. The con-
version time must be programmed using the prescale
value. This is a function of the urgency of getting a result
and the operating frequency. If interrupt operation is
desired, the EAD bit (EIE.1) must be set.
A/D OPERATION
At this time, the converter is ready to operate. Software
may either begin a conversion by setting the start con-
version bit, or enable the external start conversion pin. If
enabled, a falling edge on the pin will start conversion.
At this time, the A/D hardware will set the start/busy bit
to a logic 1. Once a conversion has been started, it can
only be interrupted by powering down the converter. An
interval of 16 A/D clocks at the prescale frequency is
used to time the conversion process. The selected input
channel will be sampled by a sample and hold for five
A/D clocks. Ten A/D clocks are used to perform the
successive approximation conversion. On the final
clock cycle, the hardware will set the EOC bit to a logic 1.
If A/D interrupts are enabled via EAD, an interrupt condi-
tion will be generated every time that EOC is set to 1
when WCQ = 0. When WCQ = 1, an interrupt will be
generated at the end of a conversion when EOC and
WCM both are set to 1. In all cases EOC should be
cleared to 0 by software after the result is read in order to
clear the interrupt condition.
If continuous operation is selected, the A/D will then
automatically restart the process on the next machine
cycle after completing the conversion. Thus, in this
case the busy flag appears to be set at all times. If the
single shot mode is selected subsequent to operation in
the continuous mode, single shot operation will take
effect when the converter finishes the current conver-
sion.
Power control of the A/D is a manual operation . The
converter defaults to a power–down condition. If soft-
ware disables power to the converter, it will require a
period of t
AD
to restart when software re–enables the
power.
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