參數(shù)資料
型號： DATASHEET
英文描述： ST10F168 - 16-BIT MCU - 8KB RAM - 256KB FLASH MEMORY - 111 I/O - 1 CAN 2.0B INTERFACE
中文描述： ST10F168 - 16位MCU - 8KB的內(nèi)存- 256KB的快閃記憶體- 111的I / O - 1 CAN 2.0B總線接口
文件頁數(shù)： 63/74頁
文件大?。?/td> 897K
代理商： DATASHEET
ST10F168
63/74
20.5.11 - Demultiplexed Bus
V
DD
= 5V ±10%, V
SS
= 0V, for Q6 version : T
A
= -40, +85°C and for Q3 version T
A
= -40, +125°C, C
L
= 100pF,
ALE cycle time = 4 TCL + 2t
A
+ t
C
+ t
F
(80ns at 25MHz CPU clock without wait states), unless otherwise
specified.
Table 25 :
Demultiplexed bus characteristics
Symbol
Parameter
Maximum
CPU Clock = 25MHz
Variable CPU Clock
1/2 TCL = 1 to 25MHz
Unit
Minimum
Maximum
Minimum
Maximum
t
5
CC
ALE high time
10 + t
A
–
TCL - 10+ t
A
–
ns
t
6
CC
Address setup to ALE
4 + t
A
–
TCL - 16+ t
A
–
ns
t
80
CC
Address / Unlatched CS setup to
RD, WR (with RW-delay)
30 + 2t
A
–
2TCL - 10 + 2t
A
–
ns
t
81
CC
Address / Unlatched CS setup to
RD, WR (no RW-delay)
10 + 2t
A
–
TCL -10 + 2t
A
–
ns
t
12
CC
RD, WR low time (with
RW-delay)
30 + t
C
–
2TCL - 10 + t
C
–
ns
t
13
CC
RD, WR low time (no RW-delay)
50 + t
C
–
3TCL - 10 + t
C
–
ns
t
14
SR
RD to valid data in (with
RW-delay)
–
20 + t
C
–
2TCL - 20 + t
C
ns
t
15
SR
RD to valid data in (no
RW-delay)
–
40 + t
C
–
3TCL - 20 + t
C
ns
t
16
SR
ALE low to valid data in
–
40 + t
A
+ t
C
–
3TCL - 20
+ t
A
+ t
C
ns
t
17
SR
Address / Unlatched CS to valid
data in
–
50 + 2t
A
+ t
C
–
4TCL - 30
+ 2t
A
+ t
C
ns
t
18
SR
Data hold after RD rising edge
0
–
0
–
ns
t
20
SR
Data float after RD rising edge
(with RW-delay)
1
2
–
26 + t
F
–
2TCL - 14
+ t
F
+ 2t
A
1
ns
t
21
SR
Data float after RD rising edge
(no RW-delay)
1
2
–
10 + t
F
–
TCL - 10
+ t
F
+ 2t
A
1
ns
t
22
CC
Data valid to WR
20 + t
C
–
2TCL- 20 + t
C
–
ns
t
24
CC
Data hold after WR
10 + t
F
–
TCL - 10+ t
F
–
ns
t
26
CC
ALE rising edge after RD, WR
-10 + t
F
–
-10 + t
F
–
ns
t
28
CC
Address / Unlatched CS hold after
RD, WR
3
0 (no t
F
)
-5 + t
F
(t
F
> 0)
–
0 (no t
F
)
-5 + t
F
(t
F
> 0)
–
ns
t
28h
CC
Address / Unlatched CS hold
after WRH
-5 + t
F
–
-5 + t
F
–
ns
t
38
CC
ALE falling edge to Latched CS
-4 - t
A
10 - t
A
-4 - t
A
10 - t
A
ns
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