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| 型號(hào)： | DATASHEET |
| 英文描述： | ST10F168 - 16-BIT MCU - 8KB RAM - 256KB FLASH MEMORY - 111 I/O - 1 CAN 2.0B INTERFACE |
| 中文描述： | ST10F168 - 16位MCU - 8KB的內(nèi)存- 256KB的快閃記憶體- 111的I / O - 1 CAN 2.0B總線接口 |
| 文件頁數(shù)： | 16/74頁 |
| 文件大小： | 897K |
| 代理商： | DATASHEET |
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ST10F168
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5.2 - Programming Examples
Programming a double Word
; code shown below assumes that Flash is mapped in segment 1
; ie. bit ROMS1 = ‘1’ in SYSCON register
Note: For easier coding, the standard data paging addressing scheme is overriden for the two MOV
instructions of the Flash Trigger Sequence (EXTS instruction). However this coding also locks
both standard and PEC interrupts and class A hardware traps. This override can be replaced by
an ATOMIC instruction if the standard DPP addressing scheme must be preserved.
; Flash must be enabled, ie. bit ROMEN = ‘1’ in SYSCON.
MOV
R0, #0DD40h
; DD4xh : Double Word programming command
OR
R0, #01h
; Selects segment 1 in flash memory
MOV
MOV
R1, #00224h
R2, #03456h
; Address to be programmed is 01’0224h
; Data to be programmed at 01’0224h
MOV
MOV
R3, #04567h
R4, #050d
; Data to be programmed at 01’0226h
; 50ns is 20MHz CPU clock frequency
MOV
#define FCR 08000h
R7, #08000h
; R7 used for Flash trigger sequence
; Flash Unlock Sequence consists in two consecutive writes, with the direct
addressing mode and then the indirect addressing mode. FCR must represent an
even address in the active address space of the Flash memory, and Rwn can be
any unused Word GPR (R6 to R15)loaded with a value resulting in the same even
address than FCR
EXTS
MOV
#1, #2
FCR, R7
; Flash can be mapped in segment 0 or 1
; first part
MOV
NOP
[R7], R7
; second part
; WARNING: place 2 NOP operations after
NOP
; the Unlock sequence to avoid all possible
; pipeline conflicts in STEAK programs
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