參數(shù)資料
型號(hào)： DATASHEET
英文描述： ST10F168 - 16-BIT MCU - 8KB RAM - 256KB FLASH MEMORY - 111 I/O - 1 CAN 2.0B INTERFACE
中文描述： ST10F168 - 16位MCU - 8KB的內(nèi)存- 256KB的快閃記憶體- 111的I / O - 1 CAN 2.0B總線接口
文件頁(yè)數(shù)： 41/74頁(yè)
文件大?。?/td> 897K
代理商： DATASHEET
ST10F168
41/74
The minimum reset circuit of Figure 14 is not ade-
quate when the
RSTIN
pin is driven from the
ST10F168 itself during software or watchdog trig-
gered resets, because of the capacitor C1 that will
keep the voltage on
RSTIN
pin above V
IL
after the
end of the internal reset sequence, and thus will
triggered an asynchronous reset sequence.
Figure 14 shows an example of a reset circuit. In
this example, R1C1 external circuit is only used to
generate power-up or manual reset, and R0C0
circuit on V
PP
is used for power-up reset and to
exit from powerdown mode. Diode D1 creates a
wired-OR gate connection to the reset pin and
may be replaced by open-collector schmitt trigger
buffer. Diode D2 provides a faster cycle time for
repetitive power-on resets.
R2 is an optional pullup for faster recovery and
correct biasing of TTL Open Collector drivers.
Figure 14 :
System Reset Circuit
RSTOUT
V
PP
RSTIN
V
CC
+
C0
R0
ST10F168
External Hardware
V
CC
R2
+
C1
R1
D2
D1
o.d.
External
Reset Source
Open Drain Inverter
V
CC
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