參數(shù)資料
型號(hào)： CR16MES544VE
廠商： National Semiconductor Corporation
元件分類： 16位微控制器
英文描述： Family of CompactRISC 16-Bit Microcontrollers
中文描述： 家庭CompactRISC 16位微控制器
文件頁(yè)數(shù)： 65/99頁(yè)
文件大?。?/td> 449K
代理商： CR16MES544VE
65
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stage divider chain consisting of a 5-bit baud rate prescaler
(UnPSC) and an 11-bit baud rate divisor (UnDIV).
The relationship between the 5-bit prescaler select (UnPSC)
setting and the prescaler factors is shown in Table18.
Table 18
Prescaler Factors
A prescaler factor of zero corresponds to “no clock.” The “no
clock” condition is the USART power down mode, in which
the USART clock is turned off to reduce power consumption.
The application program should select the “no clock” condi-
tion before entering a new baud rate. Otherwise, it could
cause incorrect data to be received or transmitted. The
UnPSR register must contain a value other than zero when
an external clock is used at CKXn.
In asynchronous mode, the baud rate is calculated by:
where BR is the baud rate, SYS_CLK is the system clock, N
is the value of the baud rate divisor + 1, and P is the prescaler
divide factor selected by the value in the UnPSR register.
The divide by 16 is performed because in the asynchronous
mode, the input frequency to the USART is 16 times the baud
rate. In synchronous mode, the input clock to the USART is
equal to the baud rate.
16.2.7
The USART is capable of generating interrupts on:
Receive Buffer Full
Receive Error
Transmit Buffer Empty
Figure32 shows a diagram of the interrupt sources and as-
sociated enable bits.
Interrupts
The interrupts can be individually enabled or disabled using
the Enable Transmit Interrupt (UnETI), Enable Receive Inter-
rupt (UnERI) and Enable Receive Error Interrupt (UnEER)
bits in the UnICTRL register.
Figure 31.
Nine Data Bit Frame Options
Prescaler
Select
Prescaler
Factor
Prescaler
Select
Prescaler
Factor
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
1
1
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
8.5
9
9.5
10
10.5
11
11.5
12
12.5
13
13.5
14
14.5
15
15.5
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
6.5
7
7.5
3
SBIT
9 BIT DATA
S
3a
SBIT
9 BIT DATA
2S
01111
8
11111
16
Table 18
Prescaler Factors
Prescaler
Select
Prescaler
Factor
Prescaler
Select
Prescaler
Factor
BR
_
CLK
16
N
×
P
×
(
)
--SYS
=
Figure 32.
USART Interrupts
UnEEI
UnERI
UnERR
UnRBF
UnFE
UnDOE
UnPE
RX
Interrupt
UnETI
UnTBE
TX
Interrupt
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