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flow of the TnCNT1 counter. In this case, the initial value on
the pin is determined by the TnAOUT bit. For example, to
start with TnA high, the software should set the TnAOUT bit
to 1 prior to enabling the timer clock. This option is available
only when the timer is configured to operate in Mode 1, 3, or
4 (in other words, when TnCRA is not used in Capture
mode)
.
14.5
The following CPU-accessible registers are used to control
the Multi-Function Timers:
Clock Prescaler Register (TnPRSC)
Clock Unit Control Register (TnCKC)
Timer/Counter I Register (TnCNT1)
Timer/Counter II Register (TnCNT2)
Reload/Capture A Register (TnCRA)
Reload/Capture B Register (TnCRB)
Timer Mode Control Register (TnCTRL)
Timer Interrupt Control Register (TnICTL)
Timer Interrupt Clear Register (TnICLR)
TIMER REGISTERS
14.5.1
The Clock Prescaler (TnPRSC) register is a byte-wide, read/
write register that holds the current value of the 5-bit clock
prescaler (CLKPS). This register is cleared upon reset. The
register format is shown below.
7
6
5
4
Reserved
Clock Prescaler Register (TnPRSC)
CLKPS
Clock Prescaler. When the timer is configured
to use the prescaled clock, the system clock is
divided by CLKPS+1 to produce the timer
clock. Thus, the system clock divide-by factor
can range from 1 to 32.
14.5.2
The Clock Unit Control (TnCKC) register is a byte-wide, read/
write register that selects the clock source for each timer/
counter. This register is cleared upon reset, which disables
the timer/counters. The register format is shown below.
7
6
5
4
Reserved
C2CSEL
Clock Unit Control Register (TnCKC)
C1CSEL
Counter I Clock Select. This 3-bit field defines
the clock mode for Timer/Counter I as follows:
000 = no clock (timer/counter I stopped)
001 = prescaled system clock
010 = external event on TnB (modes 1 and 3
only)
Table 15
Timer Interrupts Overview
Sys. Int.
Interrupt
pending
flag
Mode 1
Mode 2
Mode 3
Mode 4
PWM + Counter
Dual Input Capture +
counter
Dual Counter
Single Capture +
counter
Timer
Int. I
(TnA)
TnAPND
TnCNT1 reload from
TnCRA
TnCNT1 reload from
TnCRB
N/A
TnCNT2 underflow
Input capture on TnA
transition
Input Capture on TnB
transition
TnCNT1 underflow
TnCNT2 underflow
TnCNT1 reload from
TnCRA
N/A
TnCNT1 reload from
TnCRA
Input Capture on TnB
transition
N/A
TnCNT2 underflow
TnBPND
TnCPND
TnDPND
N/A
TnCNT2 reload from
TnCRB
Timer
Int. II
(TnB)
Table 16
Timer I/O Functions
I/O
TnAEN
TnBEN
Mode 1
Mode 2
Mode 3
Mode 4
PWM + Counter
Dual Input Capture +
counter
Dual Counter
Single Capture +
counter
TnA
TnAEN=0
TnBEN=X
TnAEN=1
TnBEN=X
No Output
Capture TnCNT1 into
TnCRA
Capture TnCNT1 into
TnCRA and preset
TnCNT1
Capture TnCNT1 into
TnCRB
Capture TnCNT1 into
TnCRB and preset
TnCNT1
No Output toggle
No Output toggle
Toggle Output on
underflow of TnCNT1
Toggle Output on
underflow of TnCNT1
Toggle Output on
underflow of TnCNT1
TnB
TnAEN=X
TnBEN=0
TnAEN=X
TnBEN=1
Ext. Event or Pulse
Accumulate Input
Ext. Event or Pulse
Accumulate Input
Ext. Event or Pulse
Accumulate Input
Ext. Event or Pulse
Accumulate Input
Capture TnCNT2 into
TnCRB
Capture TnCNT2 into
TnCRB and preset
TnCNT2
3
2
1
0
CLKPS
3
2
1
0
C1CSEL