參數(shù)資料
型號： C5NPD0-DS
英文描述： QUAD BILATERAL SWITCH FOR TRANSMISSION OR MULTIPLEXING OF ANALOG OR DIGITAL SIGNALS
中文描述： 的C - 5網(wǎng)絡處理器的數(shù)據(jù)資料硅修訂D0
文件頁數(shù)： 39/100頁
文件大?。?/td> 2163K
代理商： C5NPD0-DS
Pin Descriptions Grouped by Function
39
MOTOROLA GENERAL BUSINESS INFORMATION
C5NPD0-DS/D REV 04
Executive Processor
System Interface Signals
The XP
’
s system interface manages the supervisory controls for the network interfaces, as
well as the set of pins that provide interfaces to other components in the system that are
not memories or network interfaces. It is also the primary interface used for initializing the
C-5 NP after reset. The XP signals include PCI signals, Serial interface signals, and PROM
interface signals.
PCI Signals
The PCI can be configured to support a 32bit PCI capable of operating at either 33MHz or
66MHz. The PCI is fully compliant with PCVI Specification revision 2.1.
Table 14
describes
the PCI signals.
CP
n+3
_5
Table 6
1
LVTTL
I
RXD(7)
Receive Data (most significant bit)
CP
n+3
_6
Table 6
1
nc
nc
nc
nc
TOTAL PINS
28
*
n can be 0, 4, 8, or 12
Reference
Table 6
for pin numbers for a different cluster.
Table 13
OC-12 Signals Example (continued)
SIGNAL NAME*
PIN #
TOTAL
TYPE
I/O
LABEL
SIGNAL DESCRIPTION
Table 14
PCI Signals
SIGNAL NAME
PIN #
TOTAL
TYPE
I/O
SIGNAL DESCRIPTION
PAD0 - PAD31
T22, R21, P21, T21, R20, P20, T20,
R19, Q20, S20, R18, P19, T19,
R17, P18, T18, R16, Q18, S18, S16,
P17, T17, R15, P16, T16, S14, Q16,
T15, R14, P15, T14, Q14
32
PCI
I/O
Multiplexed Address/Data Bus. These signals are
multiplexed address and data bits. The C-5 NP
receives addresses as target and drives addresses as
master. It drives the data and receives read data as
master.
PCBEX0 - PCBEX3
N21, N20, M20, O20
4
PCI
I/O
Command byte enables. These signals are
multiplexed command and byte enabled signals.
The C-5 NP
receives byte enables as target and drives
byte enables as master.
PPAR
P14
1
PCI
I/O
Parity. This signal carries even parity for AD and CBE#
pins. It has the same receive and drive characteristics
as the address and data bus, except that it is one PCI
cycle later.
PFRAMEX
K20
1
PCI
I/O
Cycle frame
PTRDYX
L20
1
PCI
I/O
Target ready for data transfer
PIRDYX
L19
1
PCI
I/O
Initiator ready for data transfer
F
n
.
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相關代理商/技術參數(shù)
參數(shù)描述
C5NP-PB 制造商:未知廠家 制造商全稱:未知廠家 功能描述:C-5 Network Processor Fact Sheet
C5P-0 制造商:Wieland Electric Inc 功能描述:
C5P0108N-R10 制造商:ELECTROSWITCH ELECTRONIC PRODUCTS 功能描述:
C5P0112N-A 功能描述:旋鈕開關 02-12POS/1P/1SECTION RoHS:否 制造商:C&K Components 位置數(shù)量:5 卡片組數(shù)量: 每卡片組極數(shù):2 電流額定值:250 mA 電壓額定值:125 V 指數(shù)角: 觸點類型: 觸點形式:DPST 端接類型:Solder 安裝類型:Panel 觸點電鍍:Silver
C5P0112N-RA 功能描述:SWITCH ROTARY SP-12POS ENCLOSED RoHS:是 類別:開關 >> 旋轉 系列:C5 RoHS指令信息:435123-1 Statement of Compliance 產品目錄繪圖:Rotary Switch 特色產品:TE Connectivity Switches 3D 型號:435123-1.pdf 標準包裝:1 系列:6000 位置數(shù):10 層數(shù):1 每層電極數(shù):- 每層電路:BCD 觸點額定電壓:0.125A @ 115VAC 觸動器類型:旋鈕 安裝類型:PCB，通孔 端接類型:PC 引腳 方向:垂直 擺角:36° 產品目錄頁面:2570 (CN2011-ZH PDF) 其它名稱:435123-1-ND450-1183A26201A26201-ND
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