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參數(shù)資料
| 型號： | C5NPD0-DS |
| 英文描述： | QUAD BILATERAL SWITCH FOR TRANSMISSION OR MULTIPLEXING OF ANALOG OR DIGITAL SIGNALS |
| 中文描述： | 的C - 5網(wǎng)絡(luò)處理器的數(shù)據(jù)資料硅修訂D0 |
| 文件頁數(shù)： | 25/100頁 |
| 文件大小： | 2163K |
| 代理商： | C5NPD0-DS |
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External Mode
25
MOTOROLA GENERAL BUSINESS INFORMATION
C5NPD0-DS/D REV 04
simultaneously supports multiple application-defined tables and multiple search
strategies, such as those needed for routing, circuit switching, and QoS lookup tasks.
The C-5 NP uses external 64bit wide ZBT Pipelined Bursting Static RAM (SRAM) modules
(at frequencies to 133MHz) for storage of its tables. These modules allow implementation
of tables with 2
20
x 64bit entries at a cycle time of up to 7.5 nanoseconds using 4Mbit
SRAM technology. The maximum amount of memory supported by the TLU is 32MBytes
in four banks.
External Mode
There is support for external devices. Refer to the
C-5 Archictecture Guide
.
Queue Management Unit
The Queue Management Unit (QMU) autonomously manages a number of
application-defined descriptor queues. It handles inter-CP and inter-C-5 NP descriptor
flows by providing switching and buffering. It also performs descriptor replication for
multicast applications. A number of queues can be assigned to each CPRC for QoS-based
services.
The QMU provides a queuing engine internal to the chip and uses external SRAM to store
the descriptors. Scheduling is done by the CPs. The QMU supports up to 512 queues and
16, 384 descriptor buffers. A descriptor buffer holds an application-defined
“
descriptor
”
,
which is a structure that defines the payload buffer handle and other attributes of the
forwarded cell or packet.
The QMU
’
s external SRAM interface uses ZBT synchronous SRAMs organized in a single
bank of up to 128k, 32bit words. This interface runs at half (
1
/
2
) the core clock frequency.
Table 4
TLU SRAM Configurations
SRAM TECHNOLOGY*
*
For (n x 32) parts, divide total memory and number of parts by two.
MIN TABLE SIZE
(ONE BANK)
NO. OF
PARTS
MAXIMUM TABLE SIZE
(FOUR BANKS)
NO. OF
PARTS
1Mbit (32k x 32)
256kBytes
2
1MBytes
8
2Mbit (64k x 32)
512kBytes
2
2MBytes
8
4Mbit (256k x 18)
2MBytes
4
8MBytes
16
8Mbit (512k x 18
4MBytes
4
16MBytes
16
16Mbit (1M x 18)
8MBytes
4
32MBytes
16
F
n
.
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