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參數(shù)資料
| 型號： | ATA6285N-PNPW |
| 廠商： | ATMEL CORP |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, QCC32 |
| 封裝： | 5 X 5MM, QFN-32 |
| 文件頁數(shù)： | 78/121頁 |
| 文件大小： | 9917K |
| 代理商： | ATA6285N-PNPW |
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6
4958B–AUTO–11/10
Atmel ATA6285/ATA6286 [Preliminary]
2.4
Pin Names
2.4.1
V
CC
Supply voltage
2.4.2
GND
Ground
2.4.3
Port B (PB7..0)
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristic with both high sink and source cur-
rent capability. As inputs, Port B pins that are externally pulled low will source current if the
pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes
active, even if the clock is not running.
Port B also serves the functions of various special features of the ATA6289 as listed on Section
2.4.4
Port C (PC2..0)
Port C is a 3-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port C output buffers have symmetrical drive characteristic with both high sink and source cur-
rent capability. As inputs, Port C pins that are externally pulled low will source current if the
pull-up resistors are activated. The Port C pins are tri-stated when a reset condition becomes
active, even if the clock is not running.
Port C also serves the functions of various special features of the ATA6289 as listed on Section
2.4.5
Port D (PD7..0)
Port D is a 8(4)-bit bi-directional I/O port with internal pull-up resistors (selected for each bit).
The PD(6..3) pins are used as internal inter-die connections I/O ports. The Port D output buffers
have symmetrical drive characteristic with both high sink and source current capability. As
inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are
activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock
is not running.
Port D also serves the functions of various special features of the ATA6289 as listed on Section
2.4.6
RESET
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in Table 3-13 on page
42. Shorter pulses are not guaranteed to generate a reset.
2.4.7
LF (2..1)
Input coil pins for the LF-Receiver.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ATA6285N-PNQW | 功能描述:射頻微控制器 - MCU IC LF, Cap. Sens. Interface RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:Si100x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:24 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:4 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LGA-42 安裝風(fēng)格:SMD/SMT 封裝:Tube |
| ATA6285-PNPW | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:TPMS Control and Transmitter IC |
| ATA6285-PNQW | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:TPMS Control and Transmitter IC |
| ATA6286 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:TPMS Control and Transmitter IC |
| ATA6286C-PNPW | 制造商:Atmel Corporation 功能描述:IC CTLR/XMITTER 433MHZ 32QFN 制造商:Atmel Corporation 功能描述:Active RFID AVR-uC, 125kHz + 433MHz |
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