參數(shù)資料
型號(hào)： AD1801
廠商： Analog Devices, Inc.
英文描述： Single-Chip Fax/Data/ Voice Modem(單片的傳真/數(shù)據(jù)/語音調(diào)制解調(diào)器)
中文描述： 單芯片傳真/數(shù)據(jù)/語音調(diào)制解調(diào)器（單片的傳真/數(shù)據(jù)/語音調(diào)制解調(diào)器）
文件頁數(shù)： 48/52頁
文件大?。?/td> 348K
代理商： AD1801
AD1801
–48–
REV. 0
AD1801 Generated Signal Explanation:
CS1
and
CS2
are combinational decodes of the address lines
only; they do not include
REG
,
CE1
or
CE2
.
EXTWR
and
EXTRD
, when enabled in “STROBE MODE,”
are the following functions:
EXTWR
=
IOW
+
REG
+
CE1
EXTRD
=
IOR
+
REG
+
CE1
IOIS16
is a combinational decode of the SA[11:0] wires without
CS1
,
CS2
, or
REG
.
INPACK
is asserted during reads only, and depends on
IOR
,
SA[11:0],
CS1
, and
REG
. It does not depend on
CS2
.
To access the external PCMCIA functions, the AD1801 must
operate in PCMCIA mode. The SMC chip may operate in
either PCMCIA or ISA mode; ISA mode is desired because the
SMC’s COR and CSR registers do not need to be programmed
in ISA mode. ISA mode connections:
1. Connect SA[3:0] to the SMC’s A[3:0]. This provides the
register indexing.
2. The SMC must have a hard coded base address (from either
pins or EEPROM). Wire the remaining A[15:4] bits to GND
and V
DD
to match the hardcoded base address.
3. Connect the AD1801
CS1
output to the SMC’s AEN input.
REG
is the corresponding PCMCIA signal; however, the
timing for
REG
will violate the requirements of the SMC’s
AEN input. Therefore
REG
is included in the
EXTWR
and
EXTRD
signals instead.
4. Connect the SMC’s
SBHE
pin to the bus
CE2
pin.
5. Connect the SMC’s
IOW
pin to the AD1801’s
EXTWR
pin
(Pin 82, called “IRQ15/VTCL2/
EXTWR
”).
6. Connect the SMC’s
IOR
pin to the AD1801’s
EXTRD
pin
(Pin 94, called “IRQ3/VTCL1/
EXTRD
”).
Before the AD1801’s COR1 or COR2 is programmed, set the
AD1801 into “STROBE MODE” by writing to the Interrupt
Select register (DSP location 0x204). Writing bit 13 turns on
STROBE MODE, enabling
EXTRD
and
EXTWR
to replace
VCTL1 and VCTL2. Setting “STROBE MODE” in ISA mode
has no effect.
Following this setup, the timing is as follows:
t
SETUP
[
CS1
before
EXTRD
/
EXTWR
falling] = 45 ns + 2 ns = 47
ns
t
HOLD
[
CS1
from
EXTRD
/
EXTWR
rising] = 22 ns – 15 ns = 7 ns
R
C
C
C
W
S
D
A[15,8:0]
D[15:0]
A9
REG
CE1
CE2
OE
WE
RESET
IOW
IOR
SMC91C94
D[15:0]
REG
CS1
CE1
CE2
OE
WE
87
100
99
103
102
82
94
84
98
O
RS1
EXTWR
EXTRD
AD1801
SA[11:0]
Figure 14. SMC91C94 Interface to AD1801 PCMCIA Mode
C
S
D
A[3:0]
D[15:0]
AEN
INTRO
MEMR
SBHE
RESET
IOW
IOR
SMC91C94
A[9:8]
D[15:0]
CS1
CE2
INT1
87
99
101
82
94
84
RS1
EXTWR
EXTRD
AD1801
SA[11:0]
A[19:10,7:4]]
Figure 15. SMC91C94 Interface to AD1801 ISA Mode
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