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AD1801
–40–
REV. 0
Frequency Range
0 kHz to 4 kHz
4 kHz to 9 kHz
9 kHz to 16 kHz
16 kHz to 20 kHz
Roll-Off
<0.0016 dB
<0.01 dB
<0.05 dB
<0.10
MLCT
Modem DAC Level Change Timing. This bit controls when changes to the modem DAC level (see MDAM and
MDAL[4:0] bits in the ML register) take effect. When reset to “0,” changes take effect immediately. When set to
“1,” changes are delayed until either the output level crosses zero (midscale), or until a 10 ms to 12 ms timeout
period is reached. Delaying level changes until zero crossings reduces instantaneous output voltage changes, that
reduces audible “clicks.”
0 = Level Changes Applied Immediately (default)
1 = Level Changes Applied on Signal Zero (Midscale) Crossing or After 10 ms–12 ms Timeout
Modem Sample Rate Modifier. These bits are used to select the LSB weighting of the MSR[15:0] (Modem Sample
Rate) bits in the MSR register.
00 = MSR[15:0] LSB Weight is 1 Hertz (default)
01 = MSR[15:0] LSB Weight is 8/7 Hertz
10 = MSR[15:0] LSB Weight is 10/7 Hertz
11 = Reserved
Monitor Speaker Sample Rate Select.
0 = Monitor Speaker Sample Rate Locked to Modem Sample Rate (See MSR Register)
1 = Monitor Speaker Sample Rate Locked to Handset Sample Rate (See HSR Register)
Monitor Speaker Sigma-Delta Order and Bitstream Density Select. Available in PCMCIA mode or in ISA mode.
Setting this bit to a “1” will double the nominal output volume from a speaker connected to the
SPKR
pin or the
MSPKR pin, but will also significantly increase output noise. The state of the MSSDO bit should only be changed
when the monitor speaker is powered down (i.e., MSEN = 0).
0 = Third Order Modulator with 75%/25% Bitstream Positive/Negative Full-Scale Mapping
1 = First Order Modulator with 100%/0% Bitstream Positive/Negative Full-Scale Mapping
Monitor Speaker Sigma-Delta Bitstream Rate Select. Used in PCMCIA mode only and ignored in ISA mode.
These bits may be used to decrease the nominal output bitstream rate sent to the
SPKR
pin. A decreased bitstream
rate will allow more time for a piezoelectric speaker to properly discharge before being redriven, but will also de-
crease the oversampling rate, resulting in more output noise. The state of the MSSDR[2:0] bits should only be
changed when the monitor speaker is powered down (i.e., MSEN = 0).
0xx = 1411.2 kHz Bitstream Rate (default)
100 = 705.6 kHz Bitstream Rate
101 = 352.8 kHz Bitstream Rate
110 = 176.4 kHz Bitstream Rate
111 = 88.2 kHz Bitstream Rate
Monitor Speaker Analog Output Enable. Used in PCMCIA mode only and ignored in ISA mode.
0 = Analog Monitor Speaker Output (pin MSPKR) Always Powered Down
1 = Analog Monitor Speaker Output (pin MSPKR) Powered Up when MSEN is Set to “1”
Modem Enable. Up to 100
μ
s are required to enable (power-up) the modem codec channels once the codec is enabled
(see Bit CEN). Approximately 30
μ
s are required to power down these channels if MLCT (Modem DAC Level Change
Timing) is reset to “0.” Both power-up and power-down are internally sequenced to minimize instantaneous output
voltage changes; however, the power-down sequence for this channel may be quieter if MLCT is set to “1.”
0 = Modem ADC and DAC Power-Down (default)
1 = Modem ADC and DAC Enabled Provided CEN (Codec Enable Bit) is Set to “1”
Handset Enable. Up to 100
μ
s are required to enable (power-up) the handset codec channels once the codec is
enabled (see Bit CEN). Approximately 30
μ
s are required to power down these channels. Both power-up and
power-
down are internally sequenced to minimize instantaneous output voltage changes (i.e., pops and clicks).
0 = Handset ADC and DAC Powered-Down (default)
1 = Handset ADC and DAC Enabled Provided CEN (Codec Enable Bit) is Set to “1”
Monitor Speaker Enable. Up to 100
μ
s are required to enable (power up) the monitor speaker DAC channel once
the DAC is enabled (see Bit CEN). Approximately 30
μ
s are required to power down this channel. Both power-up
and power-down are internally sequenced to minimize instantaneous output voltage changes (i.e., pops and clicks).
0 = Monitor Speaker DAC Powered Down (default)
1 = Monitor Speaker DAC Enabled Provided CEN (Codec Enable Bit) = “1”
MSM[1:0]
MSSR
MSSDO
MSSDR[2:0]
MSAEN
MEN
HEN
MSEN