參數(shù)資料
型號: 8XC196LX
英文描述: 8XC196Lx - 8XC196Lx Supplement to 8X196Kx. 8X196Jx. 87C196CA User's Manual
中文描述: 8XC196Lx - 8XC196Lx補編8X196Kx。 8X196Jx。 87C196CA用戶手冊
文件頁數(shù): 92/136頁
文件大?。?/td> 659K
代理商: 8XC196LX
8XC196LXSUPPLEMENT
9-2
9.2
DESIGN CONSIDERATIONS FOR 8XC196LA, LB, AND LD
With the exception of a few new multiplexed functions, the 8XC196L
x
microcontrollers are pin
compatible with the 8XC196J
x
microcontrollers. The 8XC196J
x
microcontrollers are 52-lead
versions of 8XC196K
x
microcontrollers.
Follow these recommendations to help maintain hardware and software compatibility between
the 8XC196L
x
, 8XC196K
x
, and future microcontrollers.
Bus width.
Since the 8XC196L
x
has neither a WRH# nor a BUSWIDTH pin, the
microcontroller cannot dynamically switch between 8- and 16-bit bus widths. Program the
CCBs to select 8-bit bus mode.
Wait states.
Since the 8XC196L
x
has no READY pin, the microcontroller cannot rely on a
READY signal to control wait states. Program the CCBs to limit the number of wait states
(0, 1, 2, or 3).
EPA6–EPA7.
These functions exist in the 8XC196L
x
, but the associated pins are omitted.
You can use these functions as software timers, to start A/D conversions (on 87C196LA
and LB only), or to reset the timers.
Slave port.
Since the 8XC196L
x
has no P5.1/SLPCS and P5.4/SLPINT pins, you cannot
use the slave port.
ONCE mode.
On the 8XC196L
x
, the ONCE mode entry function is multiplexed with P2.6
(and TXJ1850 on the 87C196LB) rather than with P5.4 as it is on the 8XC196K
x
(P5.4/SLPINT/ONCE).
NMI.
Since the 8XC196L
x
has no NMI pin, the nonmaskable interrupt is not supported.
Initialize the NMI vector (at location 203EH) to point to a RET instruction. This method
provides glitch protection only.
I/O ports.
The following port pins do not exist in the 8XC196L
x
: P0.0–P0.1, P1.4–P1.7,
P2.3 and P2.5, P5.1 and P5.4–P5.7, P6.2 and P6.3. Software can still read and write the
associated P
x
_REG, P
x
_MODE, and P
x
_DIR registers. Configure the registers for the
omitted pins as follows:
— Clear the corresponding P
x
_DIR bits. (Configures pins as complementary outputs.)
— Clear the corresponding P
x
_MODE bits. (Selects I/O port function.)
— Write either “0” or “1” to the corresponding P
x
_REG bits. (Effectively ties signals low
or high.)
Do not use the bits associated with the omitted port pins for conditional branch instructions.
Treat these bits as reserved.
Auto programming.
During auto programming, the 8XC196L
x
supports only a 16-bit,
zero-wait-state bus configuration.
相關PDF資料
PDF描述
8XC51FA 8-bit CMOS (low voltage, low power and high speed) microcontroller families
8XC51FC 8-bit CMOS (low voltage, low power and high speed) microcontroller families
8XC51RD 8-bit CMOS (low voltage, low power and high speed) microcontroller families
8XC80C32 8-bit CMOS (low voltage, low power and high speed) microcontroller families
8XC51FB Low power single card reader
相關代理商/技術參數(shù)
參數(shù)描述
8XC196MC 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:INDUSTRIAL MOTOR CONTROL MICROCONTROLLER
8XC196MD 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:INDUSTRIAL MOTOR CONTROL MICROCONTROLLER
8XC196MH 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:8XC196MH INDUSTRIAL MOTOR CONTROL CHMOS MICROCONTROLLER
8XC196NP 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:COMMERCIAL CHMOS 16-BIT MICROCONTROLLER
8XC196NT 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:CHMOS MICROCONTROLLER WITH 1 MBYTE LINEAR ADDRESS SPACE