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參數(shù)資料
| 型號： | 8XC196LX |
| 英文描述： | 8XC196Lx - 8XC196Lx Supplement to 8X196Kx. 8X196Jx. 87C196CA User＇s Manual |
| 中文描述： | 8XC196Lx - 8XC196Lx補編8X196Kx。 8X196Jx。 87C196CA用戶手冊 |
| 文件頁數(shù)： | 73/136頁 |
| 文件大?。?/td> | 659K |
| 代理商： | 8XC196LX |
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8-7
J1850 COMMUNICATIONS CONTROLLER
Figure 8-3. Huntzicker Symbol Definition for J1850
A symbol is defined as a timing-level formatted bit. The VPW symbol timing requirements stip-
ulate that there is one symbol per transition and one transition per symbol. This ensures that a
message frame will always result in a uniform square waveform of varying level durations. Fig-
ure 8-4 depicts a typical Huntzicker formatted data byte of hex value CCH.
Figure 8-4. Typical VPW Waveform
Bits 7 and 3 carry logic level 1 data; however, they are represented by a passive-level symbol in
keeping with the VPW requirements. Bits 4 and 0 carry logic level 0 data and are represented by
an active-level symbol.
8.3.3
Bit Arbitration Example
The drive capacity of each symbol establishes the priority for arbitration. By definition, an active
bus level is a driven state, and a passive bus level is a non-driven, or idle, state. A driven bus state
is always given priority over an idle bus in arbitration. An “active 0” state has priority over an
“active 1” state in arbitration, because the “active 0” state is driven over a longer duration, 128
μs versus the “active 1” state’s drive time of 64 μs. Similarly, a “passive 0” state has priority over
a “passive 1” state, because the “passive 0” state comes out of its idle state in a shorter period of
time, 64 μs versus the “passive 1” state’s idle time of 128 μs.
For example, Figure 8-5 illustrates four nodes vying for the bus. Node B is the first node to dis-
continue transmitting when it attempts to transmit a “passive 1” symbol onto the bus. At the point
A5219-01
0
1
"active 0"
128μS
0
1
or
"passive 0"
64μS
0
1
"active 1"
64μS
0
1
or
"passive 1"
128μS
A5222-01
B7
"1"
B6
"1"
B5
"0"
B4
B3
"1"
"0"
B0
"0"
B1
"0"
B2
"1"
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 8XC51FA | 8-bit CMOS (low voltage, low power and high speed) microcontroller families |
| 8XC51FC | 8-bit CMOS (low voltage, low power and high speed) microcontroller families |
| 8XC51RD | 8-bit CMOS (low voltage, low power and high speed) microcontroller families |
| 8XC80C32 | 8-bit CMOS (low voltage, low power and high speed) microcontroller families |
| 8XC51FB | Low power single card reader |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 8XC196MC | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:INDUSTRIAL MOTOR CONTROL MICROCONTROLLER |
| 8XC196MD | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:INDUSTRIAL MOTOR CONTROL MICROCONTROLLER |
| 8XC196MH | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:8XC196MH INDUSTRIAL MOTOR CONTROL CHMOS MICROCONTROLLER |
| 8XC196NP | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:COMMERCIAL CHMOS 16-BIT MICROCONTROLLER |
| 8XC196NT | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:CHMOS MICROCONTROLLER WITH 1 MBYTE LINEAR ADDRESS SPACE |
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