參數(shù)資料
型號： 8XC196LX
英文描述： 8XC196Lx - 8XC196Lx Supplement to 8X196Kx. 8X196Jx. 87C196CA User＇s Manual
中文描述： 8XC196Lx - 8XC196Lx補(bǔ)編8X196Kx。 8X196Jx。 87C196CA用戶手冊
文件頁數(shù)： 11/136頁
文件大?。?/td> 659K
代理商： 8XC196LX
1-1
CHAPTER 1
GUIDE TO THIS MANUAL
This document is a supplement to the
8XC196Kx, 8XC196Jx, 87C196CA Microcontroller Family
User’s Manual
. It describes the differences between the 8XC196L
x
and the 8XC196K
x
family of
microcontrollers. For information not found in this supplement, please consult the
8XC196Kx,
8XC196Jx, 87C196CA Microcontroller Family User’s Manual
(order number 272258) or the
8XC196L
x
datasheets listed in the
“Related Documents” section of this chapter.
1.1
MANUAL CONTENTS
This supplement contains several chapters, an appendix, a glossary, and an index. This chapter,
Chapter 1, provides an overview of the supplement. This section summarizes the contents of the
remaining chapters and appendixes. The remainder of this chapter provides references to related
documentation.
Chapter 2
— Architectural Overview —
compares the features of the 8XC196L
x
microcon-
troller family with those of the 8XC196K
x
microcontroller family and describes the 87C196LA,
LB internal clock circuitry.
Chapter 3 — Address Space —
describes the addressable memory space of the 52-pin
8XC196L
x
, lists the peripheral special-function registers (SFRs), and provides tables of WSR
values for windowing higher memory into the lower register file for direct access.
Chapter 4 — Standard and PTS Interrupts —
describes the additional interrupts for the
87C196LB’s J1850 communications controller peripheral and the SFRs that support those inter-
rupts.
Chapter 5
— I/O Ports —
describes the port differences and explains the change in the port reset
state from a “l(fā)ogic 1” to a “l(fā)ogic 0” on the 87C196LA, LB.
Chapter 6
— Synchronous Serial I/O Port —
describes the enhanced synchronous serial I/O
(SSIO) port and explains how to program the two additional peripheral SFRs.
Chapter 7 — Event Processor Array —
describes the event processor array channel differenc-
es.
Chapter 8
—
J1850 Communications Controller
—
describes the
87C196LB’s integrated
J1850 controller and explains how to configure it.
Chapter 9
— Minimum Hardware Considerations —
describes device reset options through
the reset source register,
and
discusses hardware design considerations.
Chapter 10 — Special Operating Modes —
illustrates the internal clock control circuitry of the
87C196LA, LB and describes how to enter and exit on-circuit emulation (ONCE) mode.
Chapter 11
—
Programming the Nonvolatile Memory —
describes the memory maps and rec-
ommended circuits to support programming of the 87C196LA, LB’s 24 Kbytes of OTPROM.
相關(guān)PDF資料
PDF描述
8XC51FA 8-bit CMOS (low voltage, low power and high speed) microcontroller families
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8XC51RD 8-bit CMOS (low voltage, low power and high speed) microcontroller families
8XC80C32 8-bit CMOS (low voltage, low power and high speed) microcontroller families
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
8XC196MC 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:INDUSTRIAL MOTOR CONTROL MICROCONTROLLER
8XC196MD 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:INDUSTRIAL MOTOR CONTROL MICROCONTROLLER
8XC196MH 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:8XC196MH INDUSTRIAL MOTOR CONTROL CHMOS MICROCONTROLLER
8XC196NP 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:COMMERCIAL CHMOS 16-BIT MICROCONTROLLER
8XC196NT 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:CHMOS MICROCONTROLLER WITH 1 MBYTE LINEAR ADDRESS SPACE
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