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24888 Rev 3.02 - June 17, 2003
AMD-8151
TM
AGP Tunnel Data Sheet
21
AGP Most Recent Request Register
DevA:0x60
As each PIPE mode or SBA mode AGP request is transferred into the IC, the fields are placed into this register.
Thus, this register provides the fields of the most recent AGP requests. Any sticky bits from prior requests that
have not been updated in the current request are also valid. Note: fences are not captured by this register.
Default: 0000 0000 0000 0000h
Bits
Description
63:44 Reserved.
43:40
MRC: most recent command field.
Specifies the command field of the most recent AGP request.
0h=LP (low priority) read. 1h=HP (high priority) read. 4h=LP write. 5h=HP write. 8h=LP long read.
9h=HP long read. Ah=Flush.
39:3
MRA: most recent address.
Specifies address bits[39:3] of the most recent AGP request.
2:0
MRL: most recent length field.
Specifies the length field of the most recent AGP request.
Attribute: Read only.
AGP Revision and Capability Register
DevA:0xA0
Default: 0030 C002h
Bits
Description
31:24 Reserved.
23:16
AGP specification.
This field is hardwired to indicate that the IC conforms to AGP specification
revision 3.
15:8
Next capabilities block.
Specifies the offset to the next capabilities block.
7:0
Capabilities type.
Specifies the AGP capabilities block.
Attribute: Read only.
AGP Status Register
DevA:0xA4
Default: 1F00 0B2h (see bit descriptions for bits[3:0])Attribute: Read only.
Bits
Description
31:24
RQ: maximum number of outstanding requests.
This field is set to indicate support for 32
outstanding requests.
17
Isochronous support.
This bit fixed in the low state to indicate that the IC does not support
isochronous modes.
16:13 Reserved.
12:10
Calibration cycle.
This field is set to indicate a requirement for calibration cycles every 64 millisec-
onds.
9
SBA support.
This field is set to indicate support for SBA.
8
Coherency.
This bit fixed high.
7
64-bit GART support.
This bit fixed low.
6
Host translation#.
This bit fixed low.
5
Greater-than 4 gigabyte support.
This bit fixed high.