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| 型號： | 24888 |
| 英文描述： | Preliminary AMD-8151 HyperTransport AGP3.0 Graphics Tunnel Data Sheet |
| 中文描述： | 初步的AMD - 8151 HyperTransport的AGP3.0圖形隧道數(shù)據(jù)表 |
| 文件頁數(shù)： | 20/45頁 |
| 文件大小： | 755K |
| 代理商： | 24888 |
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24888 Rev 3.02 - June 17, 2003
AMD-8151
TM
AGP Tunnel Data Sheet
20
AGP PHY Skew Control Register
DevA:0x58
DSKEW and SSKEW are designed such that when they are both programmed to the same value, the AGP out-
put strobes transition near the center of the data eye. To move the strobe to a later point in the data eye, the
value of SSKEW is increased. To move the strobe to an earlier point in the data eye, DSKEW is increased.
These values translate into skew approximately as follows:
For values 0h to 8h, the skew is about: [D, S]SKEW x 80 picoseconds.
For values 9h to Fh, the skew is about: 800 + ([D, S]SKEW - 8) x 400 picoseconds.
However, these values vary with process, temperature, and voltage. Note that the lower values provide fine res-
olution and the upper values provide coarse resolution.
Default: 0000 0000h.
Bits
Description
31:8
Reserved.
7:4
DSKEW: AGP data skew.
Read-write. This specifies the alignment of the AGP data signal outputs,
A_AD[31:0], A_CBE_L[3:0], and A_DBI[H, L], relative internal clocks. 0h=The strobe transitions
earliest. Fh=The strobe transitions latest.
3:0
SSKEW: AGP strobe skew.
Read-write. This specifies the alignment of the AGP strobe signal out-
puts, A_ADSTB[1:0], relative internal clocks. 0h=The strobe transitions earliest. Fh=The strobe tran-
sitions latest.
Attribute: Read-write.
15:14
PCTL: AGP PHY P (rising edge) compensation control.
Read-write. These two bits combine to
specify the PHY rising edge compensation value that is applied to AGP signals as follows:
PCTL
00b
01b
10b
Description
Apply PCOMP directly as the compensation value.
Apply PDATA directly as the compensation value.
Apply the sum of PCOMP and PDATA as the compensation value. If the sum exceeds
1Fh, then 1Fh is applied.
Apply the difference of PCOMP minus PDATA as the compensation value. If the dif-
ference is less than 00h, then 00h is applied.
11b
13:12 Reserved.
11
RW: read-write bit.
Read-write. This controls no logic.
10:6
PDATA: AGP rising edge drive strength control.
Read-write. This value is applied to the rising-
edge (P transistor) PHY compensation as described in PCTL.
5
Reserved.
4:0
PCOMP: AGP rising edge drive strength.
Read only. This provides the calculated value of the ris-
ing-edge (P transistor) drive strength of the AGP signals. The default for this field varies. This field is
updated by the hardware approximately every 8 microseconds.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 248-8886-007 | 制造商:ITT Interconnect Solutions 功能描述:248-8886-007 / 248-8886-007 / D Sub |
| 248-8887-007 | 制造商:ITT Interconnect Solutions 功能描述:248-8887-007 / 248-8887-007 / D Sub |
| 248-8888-007 | 制造商:ITT Interconnect Solutions 功能描述:248-8888-007 / 248-8888-007 / D Sub |
| 248-8889-007 | 制造商:ITT Interconnect Solutions 功能描述:248-8889-007 / 248-8889-007 / D Sub |
| 248-8890-007 | 制造商:ITT Interconnect Solutions 功能描述:248-8890-007 / 248-8890-007 / D SUB |
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