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參數(shù)資料
| 型號： | (Z)PSD813F2 |
| 英文描述： | Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位和256K位閃速存儲器，16K位SRAM) |
| 中文描述： | Flash在系統(tǒng)可編程Mirocomputer外設(shè)（閃速，在系統(tǒng)可編程微控制器外圍器件，100萬位和256K位閃速存儲器，16K的位的SRAM） |
| 文件頁數(shù)： | 31/32頁 |
| 文件大?。?/td> | 297K |
| 代理商： | (Z)PSD813F2 |
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PSD813FH - 80C31 Design Example …Application Note
052
WSi Inc. Fremont CA 800-832-6974 www.wsipsd.com
31
"During FLASH reads, a14f is forced to zero by clearing
"pass_a14.
"a15f on the FLASH die is permanently grounded. This allows a16f,a17f,
"and a18f to page through eight segments of FLASH, each segment is 16Kbytes.
"***** Create the three most significant FLASH die addresses to page
"***** through eight segments of FLASH.
"***** Implement the following truth-table and use the PSD page
"***** register to match the memory map.
"***** | FLASH segment | 8031 address | PSD | Swap
"***** a18f a17f a16f | chip select | range | Page | bit
"***** ------------------------------------------------------------------------------------
"***** 0 0 0 | fs0 | C000 <=> FFFF | 3 | 0
"***** OR
"***** 0 0 0 | fs0 | 0000 <=> 3FFF | X | 1
"***** 0 0 1 | fs1 | 4000 <=> 7FFF | X | X
"***** 0 1 0 | fs2 | 8000 <=> BFFF | 0 | X
"***** 0 1 1 | fs3 | C000 <=> FFFF | 0 | X
"***** 1 0 0 | fs4 | 8000 <=> BFFF | 1 | X
"***** 1 0 1 | fs5 | C000 <=> FFFF | 1 | X
"***** 1 1 0 | fs6 | 8000 <=> BFFF | 2 | X
"***** 1 1 1 | fs7 | C000 <=> CFFF | 2 | X
a16f = (address >= ^h4000) & (address <= ^h7FFF) & (page == X) "fs1
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 0) "fs3
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 1) "fs5
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 2); "fs7
a17f = (address >= ^h8000) & (address <= ^hBFFF) & (page == 0) "fs2
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 0) "fs3
# (address >= ^h8000) & (address <= ^hBFFF) & (page == 2) "fs6
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 2); "fs7
a18f = (address >= ^h8000) & (address <= ^hBFFF) & (page == 1) "fs4
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 1) "fs5
# (address >= ^h8000) & (address <= ^hBFFF) & (page == 2) "fs6
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 2); "fs7
"***** Generate active low FLASH memory die chip select.
"***** csf is active when any of the fs0-7 segment selects is true.
"***** csf is defined as:
"***** !csf = fs0 # fs1 # fs2 # fs3 # fs4 # fs5 # fs6 # fs7
!csf = (address >= ^h8000) & (address <= ^hBFFF) & (page == 3) & !swap "fs0
# (address >= ^h0000) & (address <= ^h3FFF) & (page == X) & swap "fs0
# (address >= ^h4000) & (address <= ^h7FFF) & (page == X) "fs1
# (address >= ^h8000) & (address <= ^hBFFF) & (page == 0) "fs2
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 0) "fs3
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZPSD813F2-12JI | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| ZPSD813F2-12UI | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64 |
| ZPSD813F2-15J | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| ZPSD813F2-15U | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64 |
| ZPSD813F2-15UI | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64 |
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