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參數(shù)資料
| 型號： | (Z)PSD813F2 |
| 英文描述： | Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位和256K位閃速存儲器，16K位SRAM) |
| 中文描述： | Flash在系統(tǒng)可編程Mirocomputer外設（閃速，在系統(tǒng)可編程微控制器外圍器件，100萬位和256K位閃速存儲器，16K的位的SRAM） |
| 文件頁數(shù)： | 26/32頁 |
| 文件大?。?/td> | 297K |
| 代理商： | (Z)PSD813F2 |
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PSD813FH - 80C31 Design Example …Application Note
052
WSi Inc. Fremont CA 800-832-6974 www.wsipsd.com
26
Appendix A - PSDabel Source file - mcm8031.abl
module mcm8031
title 'Low cost FLASH MCU core design: WSI PSD813FH/80C31BHN';
"***** This system will serve as a low cost MCU core for many
"***** applications. The MCU is an 80C31BHN. When combined with
"***** the PSD813FH, the system has:
"*****
"***** * 128 Kbytes of FLASH memory (In-System-Programmable)
"***** - Firmware can be downloaded via RS-232
"***** - Memory management during download is implemented
"***** very simply by resources on the PSD device
"***** - Upgrade to JTAG download of firmware and chip
"***** configuration in monolithic device
"***** * 16 Kbytes of OTP Boot ROM
"***** - Upgrade to 32 Kbytes EEPROM in monolith device
"***** * 768 bytes of SRAM (256 bytes in MCU, 512 bytes in PSD)
"***** - upgrade to 2.25 KBytes in monolith device
"***** * Support for external peripherals and memory
"***** - Interface to LCD, Protocol Chip, ADC, DAC, memory
"***** - 16 demuxed address bits
"***** - 8 bit data bus
"***** - 4 programmable chip selects
"***** * 8 I/Os from 8031
"***** - Timer Inputs
"***** - General I/O
"***** * Spare I/O from PSD
"***** - 5 spare I/O in this MCM design as shown
"***** - Up to 25 spare I/O with monolith device
"***** (if not using the external peripheral support and JTAG)
"***** * I/Os feature PSD Micro<>Cell logic
"***** * UART port
"***** * 2 timer/counters
"***** * 2 external interrupts
"***** * 16 MHz Xtal
"***** * All this in two packages (44 pin and 52 pin PLCC)
"***** This system has an upgrade path to the PSD8XXF monolithic
"***** device which supports an IEEE 1149.1 JTAG interface. Pins
"***** on Port C are already reserved in this design.
"PIN DECLARATIONS
"*********** Bus Interface signals declaration *********************
"***** The following are 8031 bus input signals to the PSD PLDs.
"***** In PSDsoft Configuration dialog boxes, you must select the
"***** 8031 bus interface: 8-bit data, mux bus, rd, wr, and psen
"***** control settings with active high ale/as. Do not choose combined
"***** program and data space.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ZPSD813F2-12JI | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| ZPSD813F2-12UI | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64 |
| ZPSD813F2-15J | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| ZPSD813F2-15U | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64 |
| ZPSD813F2-15UI | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64 |
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