參數(shù)資料
型號(hào)： (Z)PSD813F2
英文描述： Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位和256K位閃速存儲(chǔ)器，16K位SRAM)
中文描述： Flash在系統(tǒng)可編程Mirocomputer外設(shè)（閃速，在系統(tǒng)可編程微控制器外圍器件，100萬位和256K位閃速存儲(chǔ)器，16K的位的SRAM）
文件頁數(shù)： 27/32頁
文件大小： 297K
代理商： (Z)PSD813F2
PSD813FH - 80C31 Design Example …Application Note
052
WSi Inc. Fremont CA 800-832-6974 www.wsipsd.com
27
"***** Signals with reserved names need no pin numbers since the
"***** PSDsoft compiler will assign them automatically.
wr pin;
rd pin;
psen pin; "program store enable
ale pin;
"address latch enable
reset pin; "system reset
"write strobe
"read strobe
"***** The following are internal latched MCU addresses that are
"***** available as input to the PSD PLDs.
a15,a14,a13,a12,a11,a10,a9,a8,a7,a6,a5,a4,a3,a2,a1,a0 pin;
"******** Port A, B, C, D pin declaration ****************************
" Port A pin assignments
"***** Port A will be in latched Address mode (will drive Port
"***** A pins with demuxed low address lines). The CPU should
"***** write 00hex to the Port A control register and FFhex to
"***** Port A Direction register at boot up. Everything else
"***** will be taken care of automatically. No equations are
"***** needed, just declare the pins here so the fitter routine
"***** does not use them for logic.
ext_ad0 pin 29; "Port A pin pa0
ext_ad1 pin 28; "Port A pin pa1
ext_ad2 pin 27; "Port A pin pa2
ext_ad3 pin 25; "Port A pin pa3
ext_ad4 pin 24; "Port A pin pa4
ext_ad5 pin 23; "Port A pin pa5
ext_ad6 pin 22; "Port A pin pa6
ext_ad7 pin 21; "Port A pin pa7
"Port B pin assignments
"***** Port B pins will provide control signals to external memory
"***** or peripherals. These are general purpose chip selects.
cs_dev0 pin 7 ; "Port B pin pb0, generic external chip select
cs_dev1 pin 6 ; "Port B pin pb1, generic external chip select
cs_dev2 pin 5 ; "Port B pin pb2, generic external chip select
cs_dev3 pin 4 ; "Port B pin pb3, generic external chip select
"pb4 pin 3; Port B pin pb4, spare Micro<>Cell pin
"pb5 pin 2; Port B pin pb5, spare Micro<>Cell pin
"pb6 pin 52; Port B pin pb6, spare Micro<>Cell pin
rs0_node pin 51; "Port B pin pb7, internal SRAM chip select node.
"Needs to go to pin in MCM only.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZPSD813F2-12JI 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52
ZPSD813F2-12UI 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64
ZPSD813F2-15J 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52
ZPSD813F2-15U 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64
ZPSD813F2-15UI 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64
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