
PSD813FH - 80C31 Design Example …Application Note
052
WSi Inc. Fremont CA 800-832-6974 www.wsipsd.com
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UART for pending host download request of main FLASH, programs main
FLASH
memory with data from UART, runs a checksum of FLASH (Figure 5), sets bit in
PSD to put main FLASH into program space (Figure 6), sets bit in PSD which
swaps ees0/ees1 with FS0 (Figure 7), sets bit in PSD to put EEPROM into data
space (Figure 8). Now the system is in normal operating mode. Next, the 8031
checks UART for host download request of boot memory, then begins execution
of application from main FLASH.
d. RS-232 cable not attached, main FLASH is blank or invalid.
Action - System boots from ees0/ees1, runs a checksum of FLASH memory, checks
UART for pending host download request of main FLASH, waits forever until
UART traffic is present (Figure 5).
e. RS-232 cable attached, main FLASH is blank or invalid.
Action - System boots from ees0/ees1, runs a checksum of FLASH memory, checks
UART for pending host download request of main FLASH, programs main
FLASH
memory with data from UART , runs a checksum of FLASH (Figure 5), sets bit in
PSD to put main FLASH into program space (Figure 6), sets bit in PSD which
swaps ees0/ees1 with FS0 (Figure 7), sets bit in PSD to put EEPROM into data
space (Figure 8). Now the system is in normal operating mode. Next, the 8031
checks UART for host download request of boot memory, then begins execution
of application from main FLASH.
f. RS-232 cable attached, main FLASH is valid, system requests a d/l of boot memory
Action - System boots from ees0/ees1, runs a checksum of FLASH memory, checks
UART for pending host download request of main FLASH (Figure 5), sets bit in
PSD to put main FLASH into program space (Figure 6), sets bit in PSD which
swaps ees0/ees1 with FS0 (Figure 7), sets bit in PSD to put EEPROM into data
space (Figure 8). Now the system is in normal operating mode. Next, the 8031
checks UART for host download request of boot memory, sets bit in PSD to
unlock EEPROM boot area, programs EEPROM boot memory with data from
UART, runs checksum of EEPROM boot area, then begins execution of
application from main FLASH.
For of any of these host RS-232 download options, it is assumed that the normal boot
(ees0/ees1) area was programmed the very first time by a device programmer before the PSD
was installed on the circuit card or by the JTAG interface while the PSD is in-circuit.
Converting this MCM design involves some edits to the PSDabel source file. Here are some
examples for the implementation of the memory map in Figures 5 - 8 using a PSD813F1:
Delete PASS_A14F definiton (page register bit pgr2).
Change SWAP bit definition to:
swap = pgr7; (was pgr3)
Update the FLASH chip select equations as follows:
fs0 = (address >= ^h9000) & (address <= ^hBFFF) & (page == X);
fs1 = (address >= ^h0000) & (address <= ^h3FFF) & (page == 0);
fs2 = (address >= ^h4000) & (address <= ^h7FFF) & (page == 0);
fs3 = (address >= ^h0000) & (address <= ^h3FFF) & (page == 1);