參數(shù)資料
型號(hào)： (Z)PSD813F2
英文描述： Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位和256K位閃速存儲(chǔ)器，16K位SRAM)
中文描述： Flash在系統(tǒng)可編程Mirocomputer外設(shè)（閃速，在系統(tǒng)可編程微控制器外圍器件，100萬位和256K位閃速存儲(chǔ)器，16K的位的SRAM）
文件頁(yè)數(shù)： 11/32頁(yè)
文件大小： 297K
代理商： (Z)PSD813F2
PSD813FH - 80C31 Design Example …Application Note
052
WSi Inc. Fremont CA 800-832-6974 www.wsipsd.com
11
1
1
1
fs7
C000
ó
FFFF
2
X
Table 3 - Flash die segment truth table
Here are the MCM PSDabel equations to implement Table 3.
a16f = (address >= ^h4000) & (address <= ^h7FFF) & (page == X) "fs1
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 0) "fs3
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 1) "fs5
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 2); "fs7
a17f = (address >= ^h8000) & (address <= ^hBFFF) & (page == 0) "fs2
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 0) "fs3
# (address >= ^h8000) & (address <= ^hBFFF) & (page == 2) "fs6
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 2); "fs7
a18f = (address >= ^h8000) & (address <= ^hBFFF) & (page == 1) "fs4
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 1) "fs5
# (address >= ^h8000) & (address <= ^hBFFF) & (page == 2) "fs6
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 2); "fs7
Next, the FLASH die chip select signal (CSF\) is implemented this way:
!csf = (address >= ^h8000) & (address <= ^hBFFF) & (page == 3) & !swap "fs0
# (address >= ^h0000) & (address <= ^h3FFF) & (page == X) & swap "fs0
# (address >= ^h4000) & (address <= ^h7FFF) & (page == X) "fs1
# (address >= ^h8000) & (address <= ^hBFFF) & (page == 0) "fs2
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 0) "fs3
# (address >= ^h8000) & (address <= ^hBFFF) & (page == 1) "fs4
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 1) "fs5
# (address >= ^h8000) & (address <= ^hBFFF) & (page == 2) "fs6
# (address >= ^hC000) & (address <= ^hFFFF) & (page == 2); "fs7
The FLASH embedded algorithm "keyhole" addresses 0x2AAA and 0x5555 must be included in
the active range of CSF\. Since the FLASH memory die address line a15F is permanently
grounded, the "keyhole" addresses are also active at the aliased addresses 0xAAAA and 0xD555
respectively.
Finally, the FLASH die read and write signals are generated by the PSD6XX die using these
equations. Notice that the SWAP bit is instrumental in moving the main FLASH memory
between
comined space and program space.
!wrf = (!wr); "Flash memory write input
!rdf = ((!rd # !psen) & !swap) "put FLASH in combined space for download
# (!psen & swap); "put FLASH in program space for normal operation
Accessing the OTP Boot ROM
The MCM contains 32 Kbytes of OTP ROM on the PSD6XX die for boot, ISP download, and
FLASH memory access routines. This OTP ROM is segmented into four 8 Kbyte segments, each
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZPSD813F2-12JI 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52
ZPSD813F2-12UI 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64
ZPSD813F2-15J 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52
ZPSD813F2-15U 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64
ZPSD813F2-15UI 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64
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