- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄381217 > (Z)PSD813F2 Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位和256K位閃速存儲(chǔ)器，16K位SRAM) PDF資料下載
參數(shù)資料
| 型號(hào)： | (Z)PSD813F2 |
| 英文描述： | Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位和256K位閃速存儲(chǔ)器，16K位SRAM) |
| 中文描述： | Flash在系統(tǒng)可編程Mirocomputer外設(shè)（閃速，在系統(tǒng)可編程微控制器外圍器件，100萬位和256K位閃速存儲(chǔ)器，16K的位的SRAM） |
| 文件頁數(shù)： | 20/32頁 |
| 文件大?。?/td> | 297K |
| 代理商： | (Z)PSD813F2 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁當(dāng)前第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
PSD813FH - 80C31 Design Example …Application Note
052
WSi Inc. Fremont CA 800-832-6974 www.wsipsd.com
20
Table 4. *.obj File Structure
The Start/Stop address is that of the *.obj file and not related to the actual EPROM or FLASH
memory address in the system or as defined in the *.abl file. Use the portion of the *.obj file that
lies between 0x50000 and 0x71FFF to place into FLASH memory on the PSD.
If you choose to use the mcm_test.hex file generated by your MCU compiler/linker, please refer
to the compiler/linker documentation for its file structure.
Conversion issues - MCM to Monolithic FLASH PSD
There will be three major areas of change when this MCM design is converted to a monolithic
FLASH PSD device.
1. Instead of an OTP boot ROM memory, you will have a reprogrammable NVM boot area
(EEPROM for PSD813F1 or FLASH for PSD813F2/F4). You can execute out of the boot
area while erasing/writing the main FLASH and visa-versa. This allows ISP updates of boot
code and will change the memory map for this MCM example as shown in Figures 5 - 8.
2. Port C pins can optionally take on the IEEE 1149.1 JTAG function. This will allow
programming of the entire PSD through the JTAG serial link. The PSD may be completely
blank and still be programmed this way. Programmable areas will include all memory,
the PLDs, and PSD configuration. The pins are multifunction and can be used as normal
I/O
when the JTAG channel is not in use. These JTAG features will not affect the memory map
of this MCM design. A low cost JTAG cable, FlashLink, will be available from WSi to
implement programming of FLASH PSDs from a PC or laptop parallel port.
3. The number of available Output Micro
ó
Cells will go from five to 16. This will not affect the
memory map of this MCM design.
Let's address how item one above impacts to the system memory map. Assume that it is desired
to use a PC or laptop as a host to download firmware to this embedded system over an RS-232
channel (instead of JTAG). These download actions can program the main FLASH memory for
the very first time, can update the main FLASH after it has once been programmed, or update
the boot code after being programmed the first time by a device programmer or JTAG link.
There are six valid boot up scenarios that must be handled by the system at power up (reset).
The default conditions at power-up place main FLASH memory in data space and EEPROM
in program space. Refer to the memory maps of Figures 5 - 8.
a. RS-232 cable not attached, main FLASH valid.
Action - System boots from ees0/ees1, runs a checksum of FLASH memory, checks
UART for pending host download request of main FLASH (Figure 5), sets bit in
PSD to put main FLASH into program space (Figure 6), sets bit in PSD which
swaps ees0/ees1 with FS0 (Figure 7), sets bit in PSD to put EEPROM into data
space (Figure 8). Now the system is in normal operating mode. Next, the 8031
checks UART for host download request of boot memory, then begins execution
of application from main FLASH.
b. RS-232 cable attached, main FLASH valid, no download demands from host.
Action - same as "a." above.
c. RS-232 cable attached, main FLASH valid, d/l of main FLASH is demanded by host.
Action - System boots from ees0/ees1, runs a checksum of FLASH memory, checks
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| (Z)PSD813F3R | Multi-Chip-Module to Monolithic Flash PSD(閃速，在系統(tǒng)可編程微控制器外圍器件，0M位閃速存儲(chǔ)器，無SRAM) |
| 1.5KA24A | AUTOMOTIVE TRANSIENT VOLTAGE SUPPRESSOR |
| 1.5KA27A | AUTOMOTIVE TRANSIENT VOLTAGE SUPPRESSOR |
| 1.5KA10 | Automotive Transient Voltage Suppressor(汽車瞬變電壓抑制器) |
| 1.5KA20 | Automotive Transient Voltage Suppressor(汽車瞬變電壓抑制器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZPSD813F2-12JI | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| ZPSD813F2-12UI | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64 |
| ZPSD813F2-15J | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| ZPSD813F2-15U | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64 |
| ZPSD813F2-15UI | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。