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W9712G8JB
Publication Release Date: Oct. 12, 2010
- 2 -
Revision A01
7.4.2
Burst mode operation.......................................................................................................24
7.4.3
Burst read mode operation...............................................................................................25
7.4.4
Burst write mode operation ..............................................................................................25
7.4.5
Write data mask ...............................................................................................................26
7.5
Burst Interrupt .....................................................................................................................................26
7.6
Precharge operation............................................................................................................................27
7.6.1
Burst read operation followed by precharge.....................................................................27
7.6.2
Burst write operation followed by precharge ....................................................................27
7.7
Auto-precharge operation ...................................................................................................................27
7.7.1
Burst read with Auto-precharge........................................................................................28
7.7.2
Burst write with Auto-precharge .......................................................................................28
7.8
Refresh Operation...............................................................................................................................29
7.9
Power Down Mode..............................................................................................................................29
7.9.1
Power Down Entry ...........................................................................................................30
7.9.2
Power Down Exit..............................................................................................................30
7.10
Input clock frequency change during precharge power down .............................................................30
8.
OPERATION MODE ...........................................................................................................................31
8.1
Command Truth Table ........................................................................................................................31
8.2
Clock Enable (CKE) Truth Table for Synchronous Transitions............................................................32
8.3
Data Mask (DM) Truth Table...............................................................................................................32
8.4
Function Truth Table ...........................................................................................................................33
8.5
Simplified Stated Diagram...................................................................................................................36
9.
ELECTRICAL CHARACTERISTICS ...................................................................................................37
9.1
Absolute Maximum Ratings.................................................................................................................37
9.2
Operating Temperature Condition.......................................................................................................37
9.3
Recommended DC Operating Conditions ...........................................................................................37
9.4
ODT DC Electrical Characteristics ......................................................................................................38
9.5
Input DC Logic Level...........................................................................................................................38
9.6
Input AC Logic Level ...........................................................................................................................38
9.7
Capacitance ........................................................................................................................................39
9.8
Leakage and Output Buffer Characteristics ........................................................................................39
9.9
DC Characteristics ..............................................................................................................................40
9.10
IDD Measurement Test Parameters....................................................................................................42
9.11
AC Characteristics ..............................................................................................................................43
9.11.1
AC Characteristics and Operating Condition for -18 speed grade ...................................43
9.11.2
AC Characteristics and Operating Condition for -25/-3 speed grades..............................45
9.12
AC Input Test Conditions ....................................................................................................................65
9.13
Differential Input/Output AC Logic Levels ...........................................................................................65
9.14
AC Overshoot / Undershoot Specification...........................................................................................66
9.14.1
AC Overshoot / Undershoot Specification for Address and Control Pins: ........................66
9.14.2
AC Overshoot / Undershoot Specification for Clock, Data, Strobe and Mask pins:..........66
10.
TIMING WAVEFORMS .......................................................................................................................67
10.1
Command Input Timing.......................................................................................................................67