參數(shù)資料
型號(hào)： SAF7118H
廠商： NXP Semiconductors N.V.
元件分類： 通用總線功能
英文描述： Multistandard video decoder with adaptive comb filter and component video input
封裝： SAF7118EH/V1<SOT807-1 (HBGA156)|<<http://www.nxp.com/packages/SOT807-1.html<1<,;SAF7118EH/V1<SOT807-1 (HBGA156)|<<http://www.nxp.com/packages/SOT807-1.html<1<,;
文件頁數(shù)： 134/175頁
文件大?。?/td> 898K
代理商： SAF7118H
SAF7118_4
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 4 July 2008
134 of 175
NXP Semiconductors
SAF7118
Multistandard video decoder with adaptive comb filter
[1]
X = don’t care.
[1]
X = don’t care.
[1]
X = don’t care.
XRV is a frame sync, V pulses are generated internally on both
edges of FS input
X port field ID is state of XRH at reference edge on XRV (defined by
XFDV)
Field ID (decoder and X port field ID) is inverted
Reference edge for field detection is falling edge of XRV
Reference edge for field detection is rising edge of XRV
X
X
1
X
X
0
X
X
X
0
1
1
X
X
X
X
X
X
X
X
Table 113. X port input reference signal definitions; register set A [92h[7:4]] and B [C2h[7:4]]
[1]
…continued
X port input reference signal definitions
Control bits D7 to D4
XFDV
XFDH
XDV1
XDV0
Table 114. X port input reference signal definitions; register set A [92h[3:0]] and B [C2h[3:0]]
[1]
X port input reference signal definitions
Control bits D3 to D0
XCODE
X
X
X
X
X
X
0
1
XDH
X
X
X
X
0
1
X
X
XDQ
X
X
0
1
X
X
X
X
XCKS
0
1
X
X
X
X
X
X
XCLK input clock and XDQ input qualifier are needed
Data rate is defined by XCLK only, no XDQ signal used
Data are qualified at XDQ input at logic 1
Data are qualified at XDQ input at logic 0
Rising edge of XRH input is horizontal reference
Falling edge of XRH input is horizontal reference
Reference signals are taken from XRH and XRV
Reference signals are decoded from EAV and SAV
Table 115. I port output format and configuration; register set A [93h[7:5]] and B [C3h[7:5]]
[1]
I port output formats and configuration
Control bits D7 to D5
ICODE
X
X
I8_16
X
X
FYSK
0
1
All lines will be output
Skip the number of leading Yonly lines, as defined by FOI1 and
FOI0
Double words are transferred byte wise, see subaddress 85h
bits ISWP1 and ISWP0
Double words are transferred 16-bit word wise via IPD and HPD,
see subaddress 85h bits ISWP1 and ISWP0
No ITU 656 like SAV/EAV codes are available
ITU 656 like SAV/EAV codes are inserted in the output data stream,
framed by a qualifier
X
0
X
X
1
X
0
1
X
X
X
X
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參數(shù)描述
SAF7118H/V1,557 功能描述:視頻 IC COMPONENT VID DECODR RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAF7129AH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder
SAF7129AH/V1 功能描述:視頻 IC 6 DAC VIDEO ENCODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAF7129AH/V1,518 功能描述:視頻 IC 6 DAC VIDEO ENCODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAF7129AH/V1,557 功能描述:視頻 IC 6 DAC VIDEO ENCODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
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