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| 型號： | S71AL016M40 |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| 中文描述： | 堆疊式多芯片產(chǎn)品（MCP）的閃存和RAM |
| 文件頁數(shù)： | 59/68頁 |
| 文件大小： | 728K |
| 代理商： | S71AL016M40 |
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February 23, 2005 S71AL016M_M0_A0
S71AL016M
59
A d v a n c e I n f o r m a t i o n
Type 4 pSRAM
4 Mbit (256K x 16)
Features
Wide voltage range: 2.7V to 3.3V
Typical active current: 3 mA @ f = 1 MHz
Low standby power
Automatic power-down when deselected
Functional Description
The Type 4 pSRAM is a high-performance CMOS pseudo static RAM (pSRAM) or-
ganized as 256K words by 16 bits that supports an asynchronous memory
interface. This device features advanced circuit design to provide ultra-low active
current. The device can be put into standby mode reducing power consumption
dramatically when deselected (CE1# Low, CE2 High or both BHE# and BLE# are
High). The input/output pins (I/O0 through I/O15) are placed in a high-imped-
ance state when: deselected (CE1# High, CE2 Low, OE# is deasserted High), or
during a write operation (Chip Enabled and Write Enable WE# Low). Reading from
the device is accomplished by asserting the Chip Enables (CE1# Low and CE2
High) and Output Enable (OE#) Low while forcing the Write Enable (WE#) High.
If Byte Low Enable (BLE#) is Low, then data from the memory location specified
by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE#) is
Low, then data from memory will appear on I/O8 to I/O15. See
Table 22
for a
complete description of read and write modes.
Product Portfolio
Notes:
1.
Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC
(typ) and T
A
= 25°C.
V
CC
Range (V)
Speed
(ns)
Power Dissipation
Operating, I
CC
(mA)
Standby (I
SB2
) (μA)
f = 1 MHz
f = f
max
Min
Typ
Max
Typ. (note 1)
Max
Typ. (note 1)
Max
Typ. (note 1)
Max
2.7V
3.0V
3.3V
70 ns
3
5
TBD
25 mA
15
40
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