參數(shù)資料
型號: S70WS512N00BFWAA2
廠商: Spansion Inc.
英文描述: Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
中文描述: 同硅晶片堆疊多芯片產(chǎn)品(MCP)的512兆位(32兆× 16位)的CMOS 1.8伏,只有同時讀/寫,突發(fā)模式閃存
文件頁數(shù): 42/93頁
文件大小: 846K
代理商: S70WS512N00BFWAA2
March 14, 2005 S70WS512N00_00_A0
S70WS512N00 Based MCPs
43
A d v a n c e I n f o r m a t i o n
The following are C source code examples of using the unlock bypass entry, program, and exit
functions. Refer to the
Spansion Low Level Driver User’s Guide
(available soon on
www.amd.com
and
www.fujitsu.com
) for general information on Spansion Flash “memory software development
guidelines.
/* Example: Unlock Bypass Entry Command */
*( (UINT16 *)bank_addr + 0x555 ) = 0x00AA; /* write unlock cycle 1 */
*( (UINT16 *)bank_addr + 0x2AA ) = 0x0055; /* write unlock cycle 2 */
*( (UINT16 *)bank_addr + 0x555 ) = 0x0020; /* write unlock bypass command */
/* At this point, programming only takes two write cycles. */
/* Once you enter Unlock Bypass Mode, do a series of like */
/* operations (programming or sector erase) and then exit */
/* Unlock Bypass Mode before beginning a different type of */
/* operations. */
/* Example: Unlock Bypass Program Command */
/* Do while in Unlock Bypass Entry Mode! */
*( (UINT16 *)bank_addr + 0x555 ) = 0x00A0; /* write program setup command */
*( (UINT16 *)pa ) = data; /* write data to be programmed */
/* Poll until done or error. */
/* If done and more to program, */
/* do above two cycles again. */
/* Example: Unlock Bypass Exit Command */
*( (UINT16 *)base_addr + 0x000 ) = 0x0090;
*( (UINT16 *)base_addr + 0x000 ) = 0x0000;
8.5.9
W rite Operation Status
The device provides several bits to determine the status of a program or erase operation. The
following subsections describe the function of DQ1, DQ2, DQ3, DQ5, DQ6, and DQ7.
DQ7: Data# Polling.
The Data# Polling bit, DQ7, indicates to the host system whether an Em-
bedded Program or Erase algorithm is in progress or completed, or whether a bank is in Erase
Suspend. Data# Polling is valid after the rising edge of the final WE# pulse in the command se-
Software Functions and Sample Code
Table 8.20 Unlock Bypass Entry
(LLD Function = lld_ UnlockBypassEntryCmd)
Cycle
Description
Operation
Byte Address
Word Address
Data
1
Unlock
Write
Base + AAAh
Base + 555h
00AAh
2
Unlock
Write
Base + 554h
Base + 2AAh
0055h
3
Entry Command
Write
Base + AAAh
Base + 555h
0020h
Table 8.21 Unlock Bypass Program
(LLD Function = lld_ UnlockBypassProgramCmd)
Cycle
Description
Operation
Byte Address
Word Address
Data
1
Program Setup Command
Write
Base + xxxh
Base + xxxh
00A0h
2
Program Command
Write
Program Address
Program Address
Program Data
Table 8.22 Unlock Bypass Reset
(LLD Function = lld_ UnlockBypassResetCmd)
Cycle
Description
Operation
Byte Address
Word Address
Data
1
Reset Cycle 1
Write
Base + xxxh
Base + xxxh
0090h
2
Reset Cycle 2
Write
Base + xxxh
Base + xxxh
0000h
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S70WS512N00BAWAA2 Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
S70WS512N00BAWAA3 Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
S70WS512N00BAWAB0 Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
S70WS512N00BAWAB2 Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
S70WS512N00BAWAB3 Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
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