- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄225036 > RG82845 Controller Miscellaneous - Datasheet Reference PDF資料下載
參數(shù)資料
| 型號(hào)： | RG82845 |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項(xiàng)-數(shù)據(jù)表參考 |
| 文件頁數(shù)： | 69/157頁 |
| 文件大?。?/td> | 1407K |
| 代理商： | RG82845 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁當(dāng)前第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁
Intel
82845MP/82845MZ Chipset-Mobile (MCH-M)
250687-002
Datasheet
19
R
Table 3. MCH-M Clock Ratio Table
Interface
Speed
CPU System Bus Frequency Ratio
System Memory
DDR 200 MHz
1:1 synchronous
AGP
66 MHz
Asynchronous
Hub interface
66 MHz
Asynchronous
1.7.
System Interrupts
The Intel 845MP/845MZ Chipset MCH-M supports both 8259 and Intel Mobile Pentium 4 Processor-M
interrupt delivery mechanisms. The serial APIC interrupt mechanism is not supported.
The 8259 support consists of flushing inbound hub interface write buffers when an Interrupt
Acknowledge cycle is forwarded from the system bus to the hub interface.
The Intel 845MP/845MZ Chipset MCH-M supports the Mobile Intel Pentium 4 Processor-M interrupt
delivery mechanism. PCI MSI interrupts are generated as Memory Writes. The MCH-M decodes
upstream Memory Writes to the range 0FEE0_0000h - 0FEEF_FFFFh from AGP and the hub interface
as message based interrupts. The MCH-M forwards the Memory Writes, along with the associated write
data, to the system bus as an Interrupt Message transaction. Note that since this address does not decode
as part of main memory, the write cycle and the write data does not get forwarded to DRAM via the write
buffer. The Intel 845MP/845MZ Chipset MCH-M provides the response and TRDY# for all Interrupt
Message cycles including the ones originating from the MCH-M. The Intel 845MP/845MZ Chipset
MCH-M supports interrupt re-direction for inter-processor interrupts (IPIs) as well as upstream interrupt
memory writes.
For message based interrupts, system write buffer coherency is maintained by relying on strict ordering
of Memory Writes. The Intel 845MP/845MZ Chipset MCH-M ensures that all Memory Writes received
from a given interface prior to an interrupt message Memory Write are delivered to the system bus for
snooping in the same order that they occur on the given interface.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RG82845MP | Controller Miscellaneous - Datasheet Reference |
| RG82845MZ | Controller Miscellaneous - Datasheet Reference |
| RG82870P2 | Controller Miscellaneous - Datasheet Reference |
| RH5RE36AA-T1-FA | 3.6 V FIXED POSITIVE LDO REGULATOR, 0.7 V DROPOUT, PSSO3 |
| RH5RE56AA-T1-FA | 5.6 V FIXED POSITIVE LDO REGULATOR, 0.7 V DROPOUT, PSSO3 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| RG82845 S L5V7 | 制造商:Intel 功能描述:MEMORY CONTROLLER HUB (MCH) FOR SDR |
| RG82845 S L5YQ | 制造商:Intel 功能描述:MEMORY CONTROLLER HUB (MCH) FOR SDR |
| RG82845 S L63W | 制造商:Intel 功能描述:MEMORY CONTROLLER HUB (MCH) FOR SDR |
| RG82845 SL5V7 | 制造商:Intel 功能描述: |
| RG82845E | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。