參數(shù)資料
型號(hào)： RG82845
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁數(shù)： 26/157頁
文件大?。?/td> 1407K
代理商： RG82845
Intel
82845MP/82845MZ Chipset-Mobile (MCH-M)
250687-002
Datasheet
121
R
MCH-M
PCI Command
C/BE[3:0]# Encoding
Cycle Destination
Response as aFRAME#
Target
Reserved
1001
N/A
No Response
Configuration Read
1010
N/A
No Response
Configuration Write
1011
N/A
No Response
Memory Read Multiple
1100
Main Memory
Read
1100
The Hub interface
No Response
Dual Address Cycle
1101
N/A
No Response
Memory Read Line
1110
Main Memory
Read
1110
The Hub interface
No Response
Memory Write and
Invalidate
1111
Main Memory
Post Data
1111
The Hub interface
No Response
NOTE:
N/A refers to a function that is not applicable.
As a target of an AGP FRAME# cycle, the MCH-M only supports the following transactions:
Memory Read. Recommended for reads of 32 bytes or less.
Memory Read Line, and Memory Read Multiple. These commands are supported identically by the
MCH-M and allow the MCH-M to continuously supply data during MRL and MRM burst.
Recommended for reads of more than 32 bytes. The MCH-M does not support reads of the hub
interface bus from AGP.
Memory Write and Memory Write and Invalidate. These commands are aliased and processed
identically. The MCH-M does not support writes of the hub interface bus from AGP.
Other Commands. Other commands such as I/O R/W and Configuration R/W are not supported by
the MCH-M as a target and result in master abort.
Exclusive Access. The MCH-M does not support PCI locked cycles as a target.
Fast Back-to-Back Transactions. MCH-M as a target supports fast back-to-back cycles from an
AGP FRAME# initiator.
As an initiator of AGP FRAME# cycle, the MCH-M only supports the following transactions:
Memory Read and Memory Read Line. MCH-M uses these commands to support read requests from
host to AGP. MCH-M does not support memory reads from the hub interface to AGP.
Memory Read Multiple. This command is not supported by the MCH-M as an AGP FRAME#
initiator.
Memory Write. MCH-M initiates AGP FRAME# write cycles on behalf of the host or the hub
interface. MCH-M does not issue Memory Write and Invalidate as an initiator. MCH-M does not
support write merging or write collapsing. MCH-M allows non-snoopable write transactions from
the hub interface to the AGP bus.
I/O Read and Write. I/O reads and writes from the host are sent to the AGP bus if they fall within
the I/O base and limit address range for the AGP bus as programmed in the MCH-M’s PCI
configuration registers. All other host-initiated I/O accesses that do not correspond to this
相關(guān)PDF資料
PDF描述
RG82845MP Controller Miscellaneous - Datasheet Reference
RG82845MZ Controller Miscellaneous - Datasheet Reference
RG82870P2 Controller Miscellaneous - Datasheet Reference
RH5RE36AA-T1-FA 3.6 V FIXED POSITIVE LDO REGULATOR, 0.7 V DROPOUT, PSSO3
RH5RE56AA-T1-FA 5.6 V FIXED POSITIVE LDO REGULATOR, 0.7 V DROPOUT, PSSO3
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
RG82845 S L5V7 制造商:Intel 功能描述:MEMORY CONTROLLER HUB (MCH) FOR SDR
RG82845 S L5YQ 制造商:Intel 功能描述:MEMORY CONTROLLER HUB (MCH) FOR SDR
RG82845 S L63W 制造商:Intel 功能描述:MEMORY CONTROLLER HUB (MCH) FOR SDR
RG82845 SL5V7 制造商:Intel 功能描述:
RG82845E 制造商:Rochester Electronics LLC 功能描述:- Bulk
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