![](http://datasheet.mmic.net.cn/330000/PM7329-BI_datasheet_16444382/PM7329-BI_84.png)
PM7329 S/UNI-APEX-1K800
DATASHEET
PMC-2010141
ISSUE 2
ATM TRAFFIC MANAGER AND SWITCH
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
70
discard is identical to a frame discard caused by congestion from a statistical
count perspective.
A VC timeout watchdog is provided to protect memory resource should a re-
assembly not complete in a timely manner. There are two procedures that are
carried out by the watch dog. The first procedure is the patrol, which is
performed by the queue engine during regular cell en-queue and de-queue
sequence. Within the context record, there is a re-assembly parking state bit,
ReasPark. The watch dog has a current re-assembly parking state bit,
CurrentReasPark. Whenever a user cell (ie not RRM or OAM cell) arrives, the
ReasPark state bit is set to the CurrentReasPark. The watch dog, initiated by
the microprocessor, will walk through a programmable range of marked VCs, that
are currently being re-assembled, to check and see if ReasPark =
CurrentReasPark. If this is true, then the VC is deemed OK. If it finds a valid VC
with ReasPark != CurrentReasPark, the VC is deemed dead. The discovery of a
dead VC initiates the watch dog re-allocation procedure. When the patrol is
complete, the CurrentReasPark bit is automatically inverted to prepare for the
next patrol.
The watch dog re-allocation procedure is performed between the cell
receive/transmit servicing. All the buffers in the VC queue are reclaimed, the VC
Q congestion counters are reset to zero, the general discard count is updated,
and VC status is reset to receive the next incoming cell as a BOM. A per-VC
maskable interrupt is invoked and the ICI is stored in a register that only holds
the ICI of the last timed out VC.
10.9.2.3
Shape Fair Queuing
The S/UNI-APEX-1K800 shaper is a passive dual rate shaper based on a time
slot design. It will shape on a per VC basis, to the traffic parameters PCR, SCR
& MBS. Traffic shaping is available on the four WAN ports, but not on the loop
ports. A maximum of four out of the sixteen WAN port classes (four ports, four
classes per port) can have shaping applied to their output. Every VC connected
to a shaped class will have shaping applied to it, but each VC can have a unique
shape rate. Classes that are not shaped can coexist on the same port as
classes that are shaped, and there can be more than one shaped class on a
single port.
Each shaper has a fundamental time unit, QShpNRTRate, which defines the
minimum time increment between successively scheduled cells. Although each
shaper is independent, the aggregate shape rate (1/QShpNRTRate) of the active
shapers must be less than the device overall cell rate limit (1.42Mc/s @ 80MHz).
The VC’s SCR is defined by the number of fundamental time units, ShpIncr,
inserted between the VC’s cell as they are scheduled by the shaper. The SCR is