![](http://datasheet.mmic.net.cn/330000/PM7329-BI_datasheet_16444382/PM7329-BI_196.png)
PM7329 S/UNI-APEX-1K800
DATASHEET
PMC-2010141
ISSUE 2
ATM TRAFFIC MANAGER AND SWITCH
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
182
Warning
: Masking should always be applied over active classes during writes.
14.4 Loop Port Scheduler Context
14.4.1 Loop Transmit Port Polling Sequence Record
MPMemSelect = Loop Port Scheduler Internal Context
MPQuadAddr = Loop#/16
The Loop Transmit Port Polling Sequence records are packed. Each long word
contains sequence numbers for four ports. Each quad word contains entries for
16 ports. There are a total of 8 quad words in the table for a total of 128 loop
ports. Long word 0 contains weight for ports 0-3, long word 1 contains weight for
ports 4-7 etc.
NOTE: Only single long word accesses are permitted at any one time.
Table 42
- Loop Transmit Port Polling Sequence
MPLWord
En (bit #)
Bits
Parameter
Description
31
Unused
Reserved
30:24
LoopPollSeq3 Loop polling sequence for port ((MPLWordEn bit *4) +
3)
23
Unused
Reserved
22:16
LoopPollSeq2 Loop polling sequence for port ((MPLWordEn bit *4) +
2)
15
Unused
Reserved
15:8
LoopPollSeq1 Loop polling sequence for port ((MPLWordEn bit *4) +
1)
7
Unused
Reserved
0/1/2/3
6:0
LoopPollSeq0 Loop polling sequence for port ((MPLWordEn bit *4) +
0)
The polling sequence determines when within a loop port scheduler weight
polling cycle this port will be evaluated to be polled. This allows software to
evenly distribute the polling of ports of the same weight. The loop port scheduler
will compare the n LSB’s of the LoopPollSeq with the current scheduler poll
sequence to decide if that port should be polled (n is equal to the port’s