![](http://datasheet.mmic.net.cn/330000/PM7329-BI_datasheet_16444382/PM7329-BI_213.png)
PM7329 S/UNI-APEX-1K800
DATASHEET
PMC-2010141
ISSUE 2
ATM TRAFFIC MANAGER AND SWITCH
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
199
Figure 45 gives an example of the functional timing of the receive interface when
configured as a UTOPIA Level 2 compliant receive master. When S/UNI-APEX-
1K800 is capable of accepting at least one more cell, the interface polls
addresses until it receives an asserted RPA. As a result, the master re-selects
the same RADR again during the last cycle RENB is high to initiate a transfer. If
the S/UNI-APEX-1K800 is capable of receiving an additional cell, it will continue
to poll for the next available port.
Once transfer is initiated, RENB will remain asserted until the last data is
received.
Figure 45
- UTOPIA L2 Receive Master (Loop & WAN)
1 RCLK
DEV 0
DEV n
Data K
Data K-1
Data 0
Data 1
Data 2
DEV 0
DEV x
DEV n
Data 0
RCLK
RADR [n:0]
RPA
RDAT [m:0], RPRTY
RENB
RSOP
Figure 46 gives an example of the functional timing of the receive interface when
configured as a Any-PHY compliant receive master. When S/UNI-APEX-1K800 is
capable of accepting at least one more cell, the interface polls addresses until it
receives an asserted RPA. As a result, the master re-selects the same RADR
again during the last cycle RENB is high to initiate a transfer. If the S/UNI-APEX-
1K800 is capable of receiving an additional cell, it will continue to poll for the next
available port.
Once transfer is initiated, RENB will remain asserted until the last data is
received.