![](http://datasheet.mmic.net.cn/260000/PLB2224_datasheet_15943610/PLB2224_8.png)
GREEN
PLB 2224
List of Figures
Page
Data Sheet
8
2002-06-03
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Figure 31
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
General System Integration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
48 x 10/100 Mbit/s Port Managed Solution . . . . . . . . . . . . . . . . . . . . . 17
MDU/MTU Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Pin Configuration (Bottom View: Power & Ground Pins) . . . . . . . . . . . 20
Pin Configuration ( Top View: Functional Part 1). . . . . . . . . . . . . . . . . 21
Pin Configuration ( Top View: Functional Part 2). . . . . . . . . . . . . . . . . 21
Pin Configuration (Top View: Functional Part 3) . . . . . . . . . . . . . . . . . 22
Pin Configuration (Top View: Functional Part 3) . . . . . . . . . . . . . . . . . 22
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Destination Port List Creation (VLAN’s Disabled) . . . . . . . . . . . . . . . . 40
Matrix Mode LED Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Delay Control for SMII Clock Internally . . . . . . . . . . . . . . . . . . . . . . . . 51
Flow Control Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Packet Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
VLAN Tag Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Address Resolution/Destination Port List Creation (VLAN Enabled). . 94
VLAN Membership Determination . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Start & Stop Condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Data Transfer on the IIC Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Acknowledge on the I2C Bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Read Protocol for IIC Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Write Protocol for IIC Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
MDIO Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202
SMII Interface Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
GMII/TBI Tx. Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204
GMII/TBI Rx. Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204
PCI / Generic Interface Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205
32-Bit Generic Interface Write Cycle - Separate Addr/Data / R / W. . 206
32-Bit Generic Interface Read Cycle - Separate Addr / Data / R / W. 207
32-Bit Generic Interface Write Cycle - Separate Addr / Data with
Strobe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
32-Bit Generic Interface Write Cycle - Separate Addr / Data with
Strobe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .209
32-Bit Generic Interface Read - Muxed Addr / Data & Separate R/W 210
32-Bit Generic Interface Write - Muxed Addr / Data & Separate R/W 211
32-Bit Generic Interface Write Cycle - Muxed Addr / Data with
Strobe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
32 Bit Generic Interface Read Cycle - Muxed Addr/Data with Strobe 213
Serial LED Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
IIC Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
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