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參數(shù)資料
| 型號： | PLB2224 |
| 英文描述： | 24+2G Switch On a Chip with Embedded Memory |
| 中文描述： | 24第二代開關與嵌入式內(nèi)存芯片 |
| 文件頁數(shù)： | 41/219頁 |
| 文件大?。?/td> | 2975K |
| 代理商： | PLB2224 |
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GREEN
PLB 2224
Functional Description
Data Sheet
41
2002-06-03
3.3.3.4
Address Aging
The address aging function is used for automatically aging out address entries in the MA
Table. Periodically, all entries in the MA Table are examined sequentially and the
ma_state[3:0] for the entries that are not locked (i.e., entries with
ma_state[3:0]
>
4’b0100) value is incremented by one. As described in
“Switch Configuration
Register” on Page 145
, the timer tick period for the aging function is determined by the
field
timer_tick_sel[2:0]
. When the
ma_state[3:0]
equals 4’b1111, the entry is considered
aged (invalid) and cannot be used for DA lookup. The locked entries are unaffected by
the aging process.
3.3.3.5
Configuring MA Table Using CPU
In a CPU-based system, the CPU can create entries in the MA Table by sending special
packets over the CPU port. The process involves two steps. In the first step, the ARL
Register described
“ARL Register” on Page 170
, is set as appropriate by writing to it.
This is followed by sending a packet whose SA is the address that is to be learnt. The
MA Table entry is constructed as follows:
Unicast Entry
– MA = SA, src_pid = ma_ports bits 4 through 0,
ma_state[3:0]
=
4’b0100, assumes ma_pri, ma_critical, ma_locked bits (see
“Chip Configuration
Register” on Page 141
) are set to 0.
Multicast Entry
– MA = SA, portlist_ix = ma_ports bits 10 through 0, ma_state[3:0] =
4’b0100, assumes ma_pri, ma_critical, ma_locked bits are set to 0.
Special Unicast Entry
- MA = SA,
src_pid
= ma_ports bits 4 through 0,
ma_state[3:0]
= encoded value of ma_pri, ma_critical, ma_locked bits.
Special Multicast Entry
- MA = SA, portlist_ix = ma_ports bits 10 through 0,
ma_state[3:0] = encoded value of ma_pri, ma_critical, ma_locked bits.
The CPU can also delete (invalidate) entries in the MA Table by first setting the
ma_delete bits in the ARL Register to ‘1’, followed by sending a special packet with SA
that matches the MAC address in the entry to be deleted.
The creation or deletion of MA Table entries requires that
e_ma_learn
bit in
“ARL
Register” on Page 170
be set to 1.
The MA Table is accessible for CPU reads and writes. Although not advised, the CPU
can also create or invalidate entries by creating MA Table entries in the software,
calculating the hash value for the MAC address and writing to the appropriate location in
the MA table.
3.3.4
Port Tx and MAC Tx
The port transmit function continuously monitors the transmit queues to see if there is a
packet that needs to be transmitted from that port. When a packet is available for
transmission, it reads the packet data from the packet buffer – first 8-byte of the packet
data are read from the SRAM while the remaining
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