
GREEN
PLB 2224
Functional Description
Data Sheet
42
2002-06-03
bytes from the EDRAM. The information about packet length and starting EDRAM
number is obtained from the packet header (PBH). The packet data is assembled and
forwarded to the MAC Tx block for the actual transmission.
In full duplex mode, the MAC Tx block works by altering the transmission behavior based
on the reception of any PAUSE frames on MAC Rx. The MAC Tx block also sends out
PAUSE frames to activate flow control if requested by MAC Rx. Refer to the section on
Flow Control (
Page 52
) for more details. For packets generated by the CPU, Port Tx
calculates the CRC before forwarding the data to the MAC Tx.
MAC Tx block generates the preamble, serializes the data and sends the packet to the
PHY device.
3.3.4.1
Packet Queuing and Port Queues
The PLB 2224 supports two priorities per port. The priority for the packet is determined
either by the ingress port priority or the results of the MA Table lookup. See the section
on Packet Prioritization (
Page 52
) for more details. Each port maintains two queues for
packet transmission – HIGH and LOW priority queue. The switch controller modifies the
packet buffer link list to append the packet to the appropriate queue of all the destination
ports for the packet.
The fixed-size, 256 entry Broadcast Table, (BcastT), allows each port to have a
maximum of 256 multiple destination packets in the Tx queue at any one time. A new
multiple destination packet that is to be transmitted from the port that has reached this
limit is dropped. When the priority feature is enabled, the BcastT is split in half, allowing
the HIGH and LOW priority queues to have a maximum of 128 multiple destination
packets. The maximum number of total (i.e., unicast and multiple destination) packets in
the HIGH and LOW priority queues is determined by the watermarks, as described in the
section on Flow Control (
Page 52
).
3.3.4.2
Packet Scheduling
The PLB 2224 uses Weighted Fair Queuing (WFQ) for transmitting packets that are in
the port queues. Setting the bandwidth_ratio[2:0] bits appropriately configures the
relative weights. The TxHQ to TxLQ bandwidth ratio can vary from 1:0 (i.e., TxLQ can
send a packet only when the TxHQ is empty), to 1:1 (i.e., about equal access for the two
queues). Refer to
“Chip Configuration Register” on Page 141
for more details.
3.3.5
Packet & Queue Manager (PQC)
The Packet manager maintains free packet buffers (pb) It allocates packet buffer to Rx
for incoming packets. It stores service count(a packet may be forwarded to more than 1
destination ports) in case of Broadcasts/Multicasts. It de-allocates the Packet Buffer if it
decides to drop the packet. Packet drop decisions are based on error,control information
from ARL& Switch Configuration Registers.It de-allocates Packet buffer or decrement