參數(shù)資料
型號(hào)： NS32FV16-25
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 數(shù)字信號(hào)處理
英文描述： Advanced Imaging/Communication Signal Processors
中文描述： 16-BIT, 50 MHz, MIXED DSP, PQCC68
封裝： PLASTIC, LCC-68
文件頁數(shù)： 7/102頁
文件大?。?/td> 1053K
代理商： NS32FV16-25
1.0 Product Introduction
(Continued)
Below is a summary of the instructions that are directly ap-
plicable to graphics along with their intended use.
Instruction
Application
BBAND
BBOR
BBFOR
BBXOR
BBSTOD
BITWT
EXTBLT
The BITBLT group of instructions provide a
method of quickly imaging characters,
creating patterns, windowing and other
block oriented effects.
MOVMP
Move Multiple Pattern is a very fast
instruction for clearing memory and drawing
patterns and lines.
TBITS
Test Bit String will measure the length of 1’s
or 0’s in an image, supporting many data
compression methods (RLL), TBITS may
also be used to test for boundaries of
images.
SBITS
Set Bit String is a very fast instruction for
filling objects, outline characters and
drawing horizontal lines.
The TBITS and SBITS instructions support
Group 3 and Group 4 CCITT standards for
compression and decompression
algorithms.
SBITPS
Set Bit Perpendicular String is a very fast
instruction for drawing vertical, horizontal
and 45
§
lines.
In printing applications SBITS and SBITPS
may be used to express portrait and
landscape respectively from the same
compressed font data. The size of the
character may be scaled as it is drawn.
SBIT
CBIT
TBIT
IBIT
The Bit group of instructions enable single
pixels anywhere in memory to be set,
cleared, tested or inverted.
INDEX
The INDEX instruction combines a multiply-
add sequence into a single instruction. This
provides a fast translation of an X-Y
address to a pixel relative address.
2.0 Architectural Description
2.1 REGISTER SET
The NS32FX164 has 32 internal registers. 17 of these regis-
ters belong to the CPU portion of the device and are ad-
dressed either implicitly by specific instructions or through
the register addressing mode. The other 15 control the op-
eration of the DSP Module, and are memory mapped.Figure
2-1 shows the NS32FX164 internal registers.
CPU Registers
w
32 Bits
x
R0–R7
Address
PC
SP0, SP1
FP
SB
INTBASE
MOD
Processor Status
PSR
Configuration
CFG
Peripherals Registers
DSP Module
A
X
Y
Z
EABR
CLPTR
OVF
PARAM
REPEAT
ABORT
EXT
CLSTAT
DSPINT
DSPMASK
NMISTAT
FIGURE 2-1. NS32FX164 Internal Registers
2.1.1 General Purpose Registers
There are eight registers (R0–R7) used for satisfying the
high speed general storage requirements, such as holding
temporary variables and addresses. The general purpose
registers are free for any use by the programmer. They are
32 bits in length. If a general purpose register is specified for
an operand that is 8 or 16 bits long, only the low part of the
register is used; the high part is not referenced or modified.
7
相關(guān)PDF資料
PDF描述
NS32FX164-25 Advanced Imaging/Communication Signal Processors(高級(jí)圖象/通訊信號(hào)處理器)
NS32FX161-15 Advanced Imaging/Communication Signal Processors(高級(jí)圖象/通訊信號(hào)處理器)
NS32FX161-20 Advanced Imaging/Communication Signal Processors(高級(jí)圖象/通訊信號(hào)處理器)
NS32FX164V-15 Advanced Imaging/Communication Signal Processors
NS32FX164V-20 Advanced Imaging/Communication Signal Processors
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