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| 型號： | NS32FV16-25 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Advanced Imaging/Communication Signal Processors |
| 中文描述： | 16-BIT, 50 MHz, MIXED DSP, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 20/102頁 |
| 文件大?。?/td> | 1053K |
| 代理商： | NS32FV16-25 |
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2.0 Architectural Description
(Continued)
2.5 GRAPHICS SUPPORT
The following sections provide a brief description of the
NS32FX164 graphics support capabilities. Basic discus-
sions on frame buffer addressing and BITBLT operations
are also provided. More detailed information on the
NS32FX164 graphics support instructions can be found in
the NS32CG16 Printer/Display Processor Programmer’s
Reference.
2.5.1 Frame Buffer Addressing
There are two basic addressing schemes for referencing
pixels within the frame buffer: Linear and Cartesian (or x-y).
Linear addressing associates a single number to each pixel
representing the physical address of the corresponding bit
in memory. Cartesian addressing associates two numbers
to each pixel representing the x and y coordinates of the
pixel relative to a point in the Cartesian space taken as the
origin. The Cartesian space is generally defined as having
the origin in the upper left. A movement to the right increas-
es the x coordinate; a movement downward increases the y
coordinate.
The correspondence between the location of a pixel in the
Cartesian space and the physical (BIT) address in memory
is shown in Figure 2-20. The origin of the Cartesian space
(x
e
0, y
e
0) corresponds to the bit address ‘ORG’. Incre-
menting the x coordinate increments the bit address by one.
Incrementing the y coordinate increments the bit address by
an amount representing the warp (or pitch) of the Cartesian
space. Thus, the linear address of a pixel at location (x, y) in
the Cartesian space can be found by the following expres-
sion.
ADDR
e
ORG
a
y
*
WARP
a
x
Warp is the distance (in bits) in the physical memory space
between two vertically adjacent bits in the Cartesian space.
Example 1 below shows two NS32FX164 instruction se-
quences to set a single pixel given the x and y coordinates.
Example 2 shows how to create a fat pixel by setting four
adjacent bits in the Cartesian space.
Example 1:
Set pixel at location (x, y)
Setup:
R0 x coordinate
R1 y coordinate
Instruction Sequence 1:
MULD
WARP, R1
; Y*WARP
ADDD
R0, R1
;
0
X
4
BIT OFFSET
SBITD
R1, ORG
; SET PIXEL
Instruction Sequence 2:
INDEXD R1, (WARP-1), R0
; Y*WARP
0
X
SBITD
R1, ORG
; SET PIXEL
Example 2:
Create fat pixel by setting bits at locations
(x, y), (x
a
1, y), (x, y
a
1) and (x
a
1, y
a
1).
Setup:
R0 x coordinate
R1 y coordinate
Instruction Sequence:
INDEXD
R1, (WARP-1), R0
; BIT ADDRESS
SBITD
41, ORG
; SET FIRST PIXEL
ADDQD
1, R1
; (X
0
1, Y)
SBITD
R1, ORG
; SECOND PIXEL
ADDD
(WARP-1), R1
; (X, Y
0
1)
SBITD
R1, ORG
; THIRD PIXEL
ADDQD
1, R1
; (X
0
1, Y
0
1)
SBITD
R1, ORG
; LAST PIXEL
TL/EE/11267–6
FIGURE 2-20. Correspondence between
Linear and Cartesian Addressing
2.5.2 BITBLT Fundamentals
BITBLT, BIT-aligned BLock Transfer, is a general operator
that provides a mechanism to move an arbitrary size rectan-
gle of an image from one part of the frame buffer to another.
During the data transfer process a bitwise logical operation
can be performed between the source and the destination
data. BITBLT is also called RasterOp: operations on rasters.
It defines two rectangular areas, source and destination,
and performs a logical operation (e.g., AND, OR, XOR) be-
tween these two areas and stores the result back to the
destination. It can be expressed in simple notation as:
Source op Destination
x
Destination
op: AND, OR, XOR, etc.
20
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NS32FX164-25 | Advanced Imaging/Communication Signal Processors(高級圖象/通訊信號處理器) |
| NS32FX161-15 | Advanced Imaging/Communication Signal Processors(高級圖象/通訊信號處理器) |
| NS32FX161-20 | Advanced Imaging/Communication Signal Processors(高級圖象/通訊信號處理器) |
| NS32FX164V-15 | Advanced Imaging/Communication Signal Processors |
| NS32FX164V-20 | Advanced Imaging/Communication Signal Processors |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NS32FX100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| NS32FX100-15 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:System Controller |
| NS32FX100VF | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:System Controller |
| NS32FX16 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| NS32FX161 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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