
Switching Characteristics: DP8428 and DP8429
(Continued)
V
CC
e
5.0V
g
10%, 0
§
C
s
T
A
s
70
§
C unless otherwise noted (Notes 2, 4, 5). The output load capacitance is typical for 4
banks of 22 DRAMs each or 88 DRAMs, including trace capacitance.
*
These values are Q0-Q9, C
L
e
500 pF; RAS0–RAS3, C
L
e
150 pF; WE, C
L
e
500 pF; CAS, C
L
e
600 pF; RL
e
500
X
unless otherwise noted. See Figure 11 for test load. Maximum propagation delays are specified with all outputs
switching.
**
Preliminary
Symbol
Refresh Parameter
Condition
*
CL
**
All C
L
e
50 pF
Units
Min
Max
Min
Max
t
RGRL
t
RGRH
t
RQHRF
t
RFRH
RGCK Low to RAS Low
Figure 3
20
41
ns
RGCK Low to RAS High
Figure 3
20
48
ns
RFSH Hold Time from RGCK
Figure 3
2T
ns
RFSH High to RAS High
(Ending Forced Refresh
early)
(See Mode 1
Description)
42
ns
t
RFSRG
RFSH Low Set-up to
RGCK Low (Mode 1)
(See Mode 1
Description)
Figure 3
12
ns
t
CSHR
CS High to RASIN Low for
Hidden Refresh
Figure 7
10
ns
t
CSRL1
for DP8429
CS Low to Access RASIN
Low (Using Mode 5 with
Auto Refresh Mode)
Figure 3
34
ns
t
for DP8428
CS Low to Access RASIN
Low (Using Mode 5 with
Auto Refresh Mode)
Figure 3
5
ns
t
CSRL0
CS Low to Access RASIN
Low (Using Modes 4 or 5
with externally controlled
Refresh)
(See Mode 5
Description)
5
ns
t
RKRL
RFCK High to RASIN
low for hidden Refresh
50
ns
Input Capacitance
T
A
e
25
§
C (Note 2)
Symbol
Parameter
Condition
Min
Typ
Max
Units
C
IN
Input Capacitance ADS, R/C, CS, M2, RASIN
8
pF
C
IN
Input Capacitance All Other Inputs
5
pF
Note 1:
‘‘Absolute Maximum Ratings’’ are the values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device
should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation.
Note 2:
All typical values are for T
A
e
25
§
C and V
CC
e
5.0V.
Note 3:
This test is provided as a monitor of Driver output source and sink current capability. Caution should be exercised in testing this parameter. In testing these
parameters, a 15
X
resistor should be placed in series with each output under test. One output should be tested at a time and test time should not exceed 1 second.
Note 4:
Input pulse 0V to 3.0V, t
R
e
t
F
e
2.5 ns, f
e
2.5 MHz, t
PW
e
200 ns. Input reference point on AC measurements is 1.5V Output reference points are 2.4V for
High and 0.8V for Low.
Note 5:
The load capacitance on RF I/O should not exceed 50 pF.
23